[Pdbg] [PATCH 3/3] p9chip: Remove checking of chiplet enabled from core probe

[Amitay Isaacs]

Reviewed-by: Amitay Isaacs <amitay at ozlabs.org>

On Thu, 2020-03-12 at 12:25 +1100, Alistair Popple wrote:
> All cores should be under a pervasive chiplet and chiplet enables
> should be checked as part of the probe there.
> 
> Signed-off-by: Alistair Popple <alistair at popple.id.au>
> ---
>  libpdbg/p9chip.c | 10 ----------
>  1 file changed, 10 deletions(-)
> 
> diff --git a/libpdbg/p9chip.c b/libpdbg/p9chip.c
> index e5169ab..63434ee 100644
> --- a/libpdbg/p9chip.c
> +++ b/libpdbg/p9chip.c
> @@ -66,10 +66,6 @@
>  #define  CHIPLET_CLK_REGION_SEL_THOLD		PPC_BITMASK(48,
> 50)
>  
>  /* PCB Slave Registers */
> -#define NET_CTRL0	0xf0040
> -#define  NET_CTRL0_CHIPLET_ENABLE	PPC_BIT(0)
> -#define  NET_CTRL0_FENCE_EN 		PPC_BIT(18)
> -#define NET_CTRL0_WOR	0xf0042
>  #define PPM_GPMMR	0xf0100
>  #define PPM_SPWKUP_FSP	0xf010b
>  #define PPM_SSHFSP	0xf0111
> @@ -449,12 +445,6 @@ static int p9_core_probe(struct pdbg_target
> *target)
>  	int i = 0;
>  	uint64_t value;
>  
> -	if (pib_read(target, NET_CTRL0, &value))
> -		return -1;
> -
> -	if (!(value & NET_CTRL0_CHIPLET_ENABLE))
> -		return -1;
> -
>  	CHECK_ERR(pib_write(target, PPM_SPWKUP_FSP, PPC_BIT(0)));
>  	do {
>  		usleep(1000);
> -- 
> 2.20.1
> 

Amitay.
-- 

Happiness is not an absence of problems; but ability to deal with them.