[Pdbg] [PATCH] p9chip: Move chiplet address translation into the hw unit

[Alistair Popple]

Commit 9c0dd8b124e6 ("dts: Add full expanded p9 device tree") altered
the structure of the device tree to reflect the target hierarchy that
FAPI expects. As a side-effect this altered the address translation as
the FAPI hierarchy does not match the translation hierarchy. A chiplet
address is the top-level address so add a translate method to
short-circuit the nested translation.

Signed-off-by: Alistair Popple <alistair at popple.id.au>
---
 libpdbg/p9chip.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/libpdbg/p9chip.c b/libpdbg/p9chip.c
index 37cc93b..da7ed00 100644
--- a/libpdbg/p9chip.c
+++ b/libpdbg/p9chip.c
@@ -597,12 +597,18 @@ static int p9_chiplet_probe(struct pdbg_target *target)
         return 0;
 }
 
+static uint64_t p9_chiplet_translate(struct pdbg_target *target, uint64_t addr)
+{
+	return addr + pdbg_target_address(target, NULL);
+}
+
 static struct chiplet p9_chiplet = {
         .target = {
                 .name = "POWER9 Chiplet",
                 .compatible = "ibm,power9-chiplet",
                 .class = "chiplet",
                 .probe = p9_chiplet_probe,
+		.translate = p9_chiplet_translate,
         },
 	.getring = p9_chiplet_getring,
 };
-- 
2.20.1