[Pdbg] [PATCH 18/19] libpdbg: Add sbefifo backend

Amitay Isaacs amitay at ozlabs.org
Thu Feb 27 12:07:03 AEDT 2020


Signed-off-by: Amitay Isaacs <amitay at ozlabs.org>
---
 Makefile.am       |   1 +
 libpdbg/dtb.c     |  19 ++
 libpdbg/libpdbg.h |   7 +-
 libpdbg/sbefifo.c |   8 +-
 p9-sbefifo.dts.m4 |  86 ++++++
 p9.dts            | 654 +++++++++++++++++++++++-----------------------
 6 files changed, 443 insertions(+), 332 deletions(-)
 create mode 100644 p9-sbefifo.dts.m4

diff --git a/Makefile.am b/Makefile.am
index a4ca5f3..6b0a415 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -77,6 +77,7 @@ endif
 DT = fake.dts fake2.dts p8-cronus.dts p9-cronus.dts \
      p8-fsi.dts p8-i2c.dts p8-kernel.dts \
      p9w-fsi.dts p9r-fsi.dts p9z-fsi.dts p9-kernel.dts \
+     p9-sbefifo.dts \
      p8-host.dts p9-host.dts p8.dts
 
 DT_sources = $(DT:.dts=.dtb.S) p9.dtb.S
diff --git a/libpdbg/dtb.c b/libpdbg/dtb.c
index f14388a..33e455c 100644
--- a/libpdbg/dtb.c
+++ b/libpdbg/dtb.c
@@ -43,6 +43,7 @@
 #include "p9-host.dt.h"
 #include "p8-cronus.dt.h"
 #include "p9-cronus.dt.h"
+#include "p9-sbefifo.dt.h"
 
 #include "p8.dt.h"
 #include "p9.dt.h"
@@ -399,6 +400,24 @@ struct pdbg_dtb *pdbg_default_dtb(void *system_fdt)
 		}
 		break;
 
+	case PDBG_BACKEND_SBEFIFO:
+		if (!pdbg_backend_option) {
+			pdbg_log(PDBG_ERROR, "No system type specified\n");
+			pdbg_log(PDBG_ERROR, "Use p9\n");
+			return NULL;
+		}
+
+		if (!strcmp(pdbg_backend_option, "p9")) {
+			if (!dtb->backend.fdt)
+				dtb->backend.fdt = &_binary_p9_sbefifo_dtb_o_start;
+			if (!dtb->system.fdt)
+				dtb->system.fdt = &_binary_p9_dtb_o_start;
+		} else {
+			pdbg_log(PDBG_ERROR, "Invalid system type %s\n", pdbg_backend_option);
+			pdbg_log(PDBG_ERROR, "Use p9\n");
+		}
+		break;
+
 	default:
 		pdbg_log(PDBG_WARNING, "Unable to determine a valid default backend, using fake backend for testing purposes\n");
 		/* Fall through */
diff --git a/libpdbg/libpdbg.h b/libpdbg/libpdbg.h
index 1fc7ef4..86f27d2 100644
--- a/libpdbg/libpdbg.h
+++ b/libpdbg/libpdbg.h
@@ -142,7 +142,6 @@ enum pdbg_target_status {
 	PDBG_TARGET_RELEASED,
 };
 
-
 /**
  * @brief Describes the various methods (referred to as backends) for
  * accessing hardware depending on where the code is executed.
@@ -197,6 +196,12 @@ enum pdbg_backend {
 	 * the BMC network address / hostname.  For example p9 at spoon2-bmc.
 	 */
 	PDBG_BACKEND_CRONUS,
+
+	/**
+	 * This backend uses sbefifo kernel driver on BMC to access hardware
+	 * via SBE.
+	 */
+	PDBG_BACKEND_SBEFIFO,
 };
 
 /**
diff --git a/libpdbg/sbefifo.c b/libpdbg/sbefifo.c
index efbf72d..96781cb 100644
--- a/libpdbg/sbefifo.c
+++ b/libpdbg/sbefifo.c
@@ -430,10 +430,10 @@ static void register_sbefifo(void)
 {
 	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &kernel_sbefifo_hw_unit);
 	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_chipop_hw_unit);
-	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pib_hw_unit);
-	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_chiplet_hw_unit);
-	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_core_hw_unit);
-	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_thread_hw_unit);
+	pdbg_hwunit_register(PDBG_BACKEND_SBEFIFO, &sbefifo_pib_hw_unit);
+	pdbg_hwunit_register(PDBG_BACKEND_SBEFIFO, &sbefifo_chiplet_hw_unit);
+	pdbg_hwunit_register(PDBG_BACKEND_SBEFIFO, &sbefifo_core_hw_unit);
+	pdbg_hwunit_register(PDBG_BACKEND_SBEFIFO, &sbefifo_thread_hw_unit);
 	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_mem_hw_unit);
 	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pba_hw_unit);
 }
diff --git a/p9-sbefifo.dts.m4 b/p9-sbefifo.dts.m4
new file mode 100644
index 0000000..48b3051
--- /dev/null
+++ b/p9-sbefifo.dts.m4
@@ -0,0 +1,86 @@
+/dts-v1/;
+
+/ {
+	#address-cells = <0x1>;
+	#size-cells = <0x0>;
+
+	fsi0: kernelfsi at 0 {
+		#address-cells = <0x2>;
+		#size-cells = <0x1>;
+		compatible = "ibm,kernel-fsi";
+		reg = <0x0 0x0 0x0>;
+		index = <0x0>;
+		status = "mustexist";
+		system-path = "/proc0/fsi";
+
+		sbefifo at 2400 { /* Bogus address */
+			reg = <0x0 0x2400 0x7>;
+			index = <0x0>;
+			compatible = "ibm,kernel-sbefifo";
+			device-path = "/dev/sbefifo1";
+
+			sbefifo-pib {
+				#address-cells = <0x2>;
+				#size-cells = <0x1>;
+				index = <0x0>;
+				compatible = "ibm,sbefifo-pib";
+				system-path = "/proc0/pib";
+			};
+
+			sbefifo-mem {
+				compatible = "ibm,sbefifo-mem";
+				system-path = "/mem0";
+			};
+
+			sbefifo-pba {
+				compatible = "ibm,sbefifo-mem-pba";
+				system-path = "/mempba0";
+			};
+
+			sbefifo-chipop {
+				compatible = "ibm,sbefifo-chipop";
+				index = <0x0>;
+			};
+		};
+
+		hmfsi at 100000 {
+			#address-cells = <0x2>;
+			#size-cells = <0x1>;
+			compatible = "ibm,fsi-hmfsi";
+			reg = <0x0 0x100000 0x8000>;
+			port = <0x1>;
+			index = <0x1>;
+			system-path = "/proc1/fsi";
+
+			sbefifo at 2400 { /* Bogus address */
+				reg = <0x0 0x2400 0x7>;
+				index = <0x1>;
+				compatible = "ibm,kernel-sbefifo";
+				device-path = "/dev/sbefifo2";
+
+				sbefifo-pib {
+					#address-cells = <0x2>;
+					#size-cells = <0x1>;
+					index = <0x1>;
+					compatible = "ibm,sbefifo-pib";
+					system-path = "/proc1/pib";
+				};
+
+				sbefifo-mem {
+					compatible = "ibm,sbefifo-mem";
+					system-path = "/mem1";
+				};
+
+				sbefifo-pba {
+					compatible = "ibm,sbefifo-mem-pba";
+					system-path = "/mempba1";
+				};
+
+				sbefifo-chipop {
+					compatible = "ibm,sbefifo-chipop";
+					index = <0x1>;
+				};
+			};
+		};
+	};
+};
diff --git a/p9.dts b/p9.dts
index ffbc44e..b917b03 100644
--- a/p9.dts
+++ b/p9.dts
@@ -37,7 +37,7 @@
 			};
 
 			chiplet at 1000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x01 >;
 				reg = < 0x00 0x1000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -51,7 +51,7 @@
 			};
 
 			chiplet at 2000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x02 >;
 				reg = < 0x00 0x2000000 0xfffff >;
 
@@ -67,7 +67,7 @@
 			};
 
 			chiplet at 3000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x03 >;
 				reg = < 0x00 0x3000000 0xfffff >;
 
@@ -83,7 +83,7 @@
 			};
 
 			chiplet at 4000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x04 >;
 				reg = < 0x00 0x4000000 0xfffff >;
 
@@ -99,7 +99,7 @@
 			};
 
 			chiplet at 5000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x05 >;
 				reg = < 0x00 0x5000000 0xfffff >;
 
@@ -115,7 +115,7 @@
 			};
 
 			chiplet at 6000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x06 >;
 				reg = < 0x00 0x6000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -130,7 +130,7 @@
 			};
 
 			chiplet at 7000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x07 >;
 				reg = < 0x00 0x7000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -169,7 +169,7 @@
 			};
 
 			chiplet at 8000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x08 >;
 				reg = < 0x00 0x8000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -208,7 +208,7 @@
 			};
 
 			chiplet at 9000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x09 >;
 				reg = < 0x00 0x9000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -222,7 +222,7 @@
 			};
 
 			chiplet at c000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x0c >;
 				reg = < 0x00 0xc000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -236,25 +236,25 @@
 			};
 
 			chiplet at d000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x0d >;
 				reg = < 0x00 0xd000000 0xfffff >;
 			};
 
 			chiplet at e000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x0e >;
 				reg = < 0x00 0xe000000 0xfffff >;
 			};
 
 			chiplet at f000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x0f >;
 				reg = < 0x00 0xf000000 0xfffff >;
 			};
 
 			chiplet at 10000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x10 >;
 				reg = < 0x00 0x10000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -277,40 +277,40 @@
 						chiplet at 20000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x20 >;
 							reg = < 0x00 0x20000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x00 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -321,40 +321,40 @@
 						chiplet at 21000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x21 >;
 							reg = < 0x00 0x21000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x01 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -373,40 +373,40 @@
 						chiplet at 22000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x22 >;
 							reg = < 0x00 0x22000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x02 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -417,40 +417,40 @@
 						chiplet at 23000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x23 >;
 							reg = < 0x00 0x23000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x03 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -462,7 +462,7 @@
 			};
 
 			chiplet at 11000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x11 >;
 				reg = < 0x00 0x11000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -485,40 +485,40 @@
 						chiplet at 24000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x24 >;
 							reg = < 0x00 0x24000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x04 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -529,40 +529,40 @@
 						chiplet at 25000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x25 >;
 							reg = < 0x00 0x25000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x05 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -581,40 +581,40 @@
 						chiplet at 26000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x26 >;
 							reg = < 0x00 0x26000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x06 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -625,40 +625,40 @@
 						chiplet at 27000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x27 >;
 							reg = < 0x00 0x27000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x07 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -670,7 +670,7 @@
 			};
 
 			chiplet at 12000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x12 >;
 				reg = < 0x00 0x12000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -693,40 +693,40 @@
 						chiplet at 28000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x28 >;
 							reg = < 0x00 0x28000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x08 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -737,40 +737,40 @@
 						chiplet at 29000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x29 >;
 							reg = < 0x00 0x29000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x09 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -789,40 +789,40 @@
 						chiplet at 2a000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x2a >;
 							reg = < 0x00 0x2a000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x0a >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -833,40 +833,40 @@
 						chiplet at 2b000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x2b >;
 							reg = < 0x00 0x2b000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x0b >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -878,7 +878,7 @@
 			};
 
 			chiplet at 13000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x13 >;
 				reg = < 0x00 0x13000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -901,40 +901,40 @@
 						chiplet at 2c000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x2c >;
 							reg = < 0x00 0x2c000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x0c >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -945,40 +945,40 @@
 						chiplet at 2d000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x2d >;
 							reg = < 0x00 0x2d000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x0d >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -997,40 +997,40 @@
 						chiplet at 2e000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x2e >;
 							reg = < 0x00 0x2e000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x0e >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -1041,40 +1041,40 @@
 						chiplet at 2f000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x2f >;
 							reg = < 0x00 0x2f000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x0f >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -1086,7 +1086,7 @@
 			};
 
 			chiplet at 14000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x14 >;
 				reg = < 0x00 0x14000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -1109,40 +1109,40 @@
 						chiplet at 30000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x30 >;
 							reg = < 0x00 0x30000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x10 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -1153,40 +1153,40 @@
 						chiplet at 31000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x31 >;
 							reg = < 0x00 0x31000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x11 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -1205,40 +1205,40 @@
 						chiplet at 32000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x32 >;
 							reg = < 0x00 0x32000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x12 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -1249,40 +1249,40 @@
 						chiplet at 33000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x33 >;
 							reg = < 0x00 0x33000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x13 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -1294,7 +1294,7 @@
 			};
 
 			chiplet at 15000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x15 >;
 				reg = < 0x00 0x15000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -1317,40 +1317,40 @@
 						chiplet at 34000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x34 >;
 							reg = < 0x00 0x34000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x14 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -1361,40 +1361,40 @@
 						chiplet at 35000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x35 >;
 							reg = < 0x00 0x35000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x15 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -1413,40 +1413,40 @@
 						chiplet at 36000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x36 >;
 							reg = < 0x00 0x36000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x16 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -1457,40 +1457,40 @@
 						chiplet at 37000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x37 >;
 							reg = < 0x00 0x37000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x17 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -1520,7 +1520,7 @@
 			index = < 0x00 >;
 
 			adu at 90000 {
-				compatible = "ibm-power9-adu";
+				compatible = "ibm,power9-adu";
 				reg = < 0x00 0x90000 0x50 >;
 				system-path = "/mem1";
 			};
@@ -1538,7 +1538,7 @@
 			};
 
 			chiplet at 1000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x01 >;
 				reg = < 0x00 0x1000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -1552,7 +1552,7 @@
 			};
 
 			chiplet at 2000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x02 >;
 				reg = < 0x00 0x2000000 0xfffff >;
 
@@ -1568,7 +1568,7 @@
 			};
 
 			chiplet at 3000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x03 >;
 				reg = < 0x00 0x3000000 0xfffff >;
 
@@ -1584,7 +1584,7 @@
 			};
 
 			chiplet at 4000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x04 >;
 				reg = < 0x00 0x4000000 0xfffff >;
 
@@ -1600,7 +1600,7 @@
 			};
 
 			chiplet at 5000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x05 >;
 				reg = < 0x00 0x5000000 0xfffff >;
 
@@ -1616,7 +1616,7 @@
 			};
 
 			chiplet at 6000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x06 >;
 				reg = < 0x00 0x6000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -1631,7 +1631,7 @@
 			};
 
 			chiplet at 7000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x07 >;
 				reg = < 0x00 0x7000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -1670,7 +1670,7 @@
 			};
 
 			chiplet at 8000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x08 >;
 				reg = < 0x00 0x8000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -1709,7 +1709,7 @@
 			};
 
 			chiplet at 9000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x09 >;
 				reg = < 0x00 0x9000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -1723,7 +1723,7 @@
 			};
 
 			chiplet at c000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x0c >;
 				reg = < 0x00 0xc000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -1737,25 +1737,25 @@
 			};
 
 			chiplet at d000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x0d >;
 				reg = < 0x00 0xd000000 0xfffff >;
 			};
 
 			chiplet at e000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x0e >;
 				reg = < 0x00 0xe000000 0xfffff >;
 			};
 
 			chiplet at f000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x0f >;
 				reg = < 0x00 0xf000000 0xfffff >;
 			};
 
 			chiplet at 10000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x10 >;
 				reg = < 0x00 0x10000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -1778,40 +1778,40 @@
 						chiplet at 20000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x20 >;
 							reg = < 0x00 0x20000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x00 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -1822,40 +1822,40 @@
 						chiplet at 21000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x21 >;
 							reg = < 0x00 0x21000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x01 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -1874,40 +1874,40 @@
 						chiplet at 22000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x22 >;
 							reg = < 0x00 0x22000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x02 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -1918,40 +1918,40 @@
 						chiplet at 23000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x23 >;
 							reg = < 0x00 0x23000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x03 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -1963,7 +1963,7 @@
 			};
 
 			chiplet at 11000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x11 >;
 				reg = < 0x00 0x11000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -1986,40 +1986,40 @@
 						chiplet at 24000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x24 >;
 							reg = < 0x00 0x24000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x04 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2030,40 +2030,40 @@
 						chiplet at 25000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x25 >;
 							reg = < 0x00 0x25000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x05 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2082,40 +2082,40 @@
 						chiplet at 26000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x26 >;
 							reg = < 0x00 0x26000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x06 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2126,40 +2126,40 @@
 						chiplet at 27000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x27 >;
 							reg = < 0x00 0x27000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x07 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2171,7 +2171,7 @@
 			};
 
 			chiplet at 12000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x12 >;
 				reg = < 0x00 0x12000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -2194,40 +2194,40 @@
 						chiplet at 28000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x28 >;
 							reg = < 0x00 0x28000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x08 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2238,40 +2238,40 @@
 						chiplet at 29000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x29 >;
 							reg = < 0x00 0x29000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x09 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2290,40 +2290,40 @@
 						chiplet at 2a000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x2a >;
 							reg = < 0x00 0x2a000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x0a >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2334,40 +2334,40 @@
 						chiplet at 2b000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x2b >;
 							reg = < 0x00 0x2b000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x0b >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2379,7 +2379,7 @@
 			};
 
 			chiplet at 13000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x13 >;
 				reg = < 0x00 0x13000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -2402,40 +2402,40 @@
 						chiplet at 2c000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x2c >;
 							reg = < 0x00 0x2c000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x0c >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2446,40 +2446,40 @@
 						chiplet at 2d000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x2d >;
 							reg = < 0x00 0x2d000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x0d >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2498,40 +2498,40 @@
 						chiplet at 2e000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x2e >;
 							reg = < 0x00 0x2e000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x0e >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2542,40 +2542,40 @@
 						chiplet at 2f000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x2f >;
 							reg = < 0x00 0x2f000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x0f >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2587,7 +2587,7 @@
 			};
 
 			chiplet at 14000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x14 >;
 				reg = < 0x00 0x14000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -2610,40 +2610,40 @@
 						chiplet at 30000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x30 >;
 							reg = < 0x00 0x30000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x10 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2654,40 +2654,40 @@
 						chiplet at 31000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x31 >;
 							reg = < 0x00 0x31000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x11 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2706,40 +2706,40 @@
 						chiplet at 32000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x32 >;
 							reg = < 0x00 0x32000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x12 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2750,40 +2750,40 @@
 						chiplet at 33000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x33 >;
 							reg = < 0x00 0x33000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x13 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2795,7 +2795,7 @@
 			};
 
 			chiplet at 15000000 {
-				compatible = "ibm,power9-chiplet";
+				compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 				index = < 0x15 >;
 				reg = < 0x00 0x15000000 0xfffff >;
 				#address-cells = < 0x02 >;
@@ -2818,40 +2818,40 @@
 						chiplet at 34000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x34 >;
 							reg = < 0x00 0x34000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x14 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2862,40 +2862,40 @@
 						chiplet at 35000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x35 >;
 							reg = < 0x00 0x35000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x15 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2914,40 +2914,40 @@
 						chiplet at 36000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x36 >;
 							reg = < 0x00 0x36000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x16 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
@@ -2958,40 +2958,40 @@
 						chiplet at 37000000 {
 							#address-cells = < 0x02 >;
 							#size-cells = < 0x01 >;
-							compatible = "ibm,power9-chiplet";
+							compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet";
 							index = < 0x37 >;
 							reg = < 0x00 0x37000000 0xfffff >;
 
 							core at 0 {
 								#address-cells = < 0x01 >;
 								#size-cells = < 0x00 >;
-								compatible = "ibm,power9-core";
+								compatible = "ibm,sbefifo-core", "ibm,power9-core";
 								index = < 0x17 >;
 								reg = < 0x00 0x00 0xfffff >;
 
 								thread at 0 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x00 >;
 									index = < 0x00 >;
 								};
 
 								thread at 1 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x01 >;
 									index = < 0x01 >;
 								};
 
 								thread at 2 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x02 >;
 									index = < 0x02 >;
 								};
 
 								thread at 3 {
-									compatible = "ibm,power9-thread";
+									compatible = "ibm,sbefifo-thread", "ibm,power9-thread";
 									reg = < 0x00 >;
 									tid = < 0x03 >;
 									index = < 0x03 >;
-- 
2.24.1



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