[Pdbg] [PATCH 08/11] dts: Populate all possible chips in p9 system tree
Amitay Isaacs
amitay at ozlabs.org
Thu Apr 30 13:05:41 AEST 2020
Convert repeated patterns to m4 macros to avoid errors.
Signed-off-by: Amitay Isaacs <amitay at ozlabs.org>
---
p9.dts.m4 | 3211 ++---------------------------
tests/test_p9_fapi_translation.sh | 774 +++++++
2 files changed, 988 insertions(+), 2997 deletions(-)
diff --git a/p9.dts.m4 b/p9.dts.m4
index 1e99937..6cdfba4 100644
--- a/p9.dts.m4
+++ b/p9.dts.m4
@@ -1,61 +1,146 @@
-/dts-v1/;
-
-/ {
-
- mem0 {
- index = < 0x00 >;
+define(`CONCAT', `$1$2')dnl
+
+dnl
+dnl CORE([index])
+dnl
+define(`THREAD',
+`
+ thread@$1 {
+ reg = <0x00>;
+ compatible = "ibm,power-thread", "ibm,power9-thread";
+ tid = <0x$1>;
+ index = <0x$1>;
+ };
+')dnl
+
+dnl
+dnl CORE([index])
+dnl
+define(`CORE',
+`
+ core at 0 {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ reg = <0x00 0x00 0xfffff>;
+ compatible = "ibm,power-core", "ibm,power9-core";
+ index = <0x$1>;
+
+ THREAD(0)
+ THREAD(1)
+ THREAD(2)
+ THREAD(3)
+ };
+')dnl
+
+dnl
+dnl CHIPLET__([index])
+dnl
+define(`CHIPLET__',
+`define(`addr', CONCAT($1, 000000))dnl
+
+ CONCAT(chiplet@, addr) {
+ reg = <0x00 CONCAT(0x,addr) 0xfffff>;
+ compatible = "ibm,power9-chiplet";
+ index = <0x$1>;
+
+')dnl
+
+dnl
+dnl CHIPLET_([index])
+dnl
+define(`CHIPLET_',
+`define(`addr', CONCAT($1, 000000))dnl
+
+ CONCAT(chiplet@, addr) {
+ #address-cells = <0x02>;
+ #size-cells = <0x01>;
+ reg = <0x00 CONCAT(0x,addr) 0xfffff>;
+ compatible = "ibm,power9-chiplet";
+ index = <0x$1>;
+
+')dnl
+
+dnl
+dnl EQ_([index])
+dnl
+define(`EQ_',
+`define(`chiplet_id', CONCAT(1, $1))dnl
+define(`addr', CONCAT(chiplet_id, 000000))dnl
+
+ eq@$1 {
+ #address-cells = <0x02>;
+ #size-cells = <0x01>;
+ reg = <0x00 CONCAT(0x,addr) 0xfffff>;
+ compatible = "ibm,power9-eq";
+ index = <$1>;
+
+')dnl
+
+dnl
+dnl EX_([eq_index, ex_index])
+dnl
+define(`EX_',
+`define(`chiplet_id', CONCAT(1, $1))dnl
+define(`addr', CONCAT(chiplet_id, 000000))dnl
+
+ ex@$2 {
+ #address-cells = <0x02>;
+ #size-cells = <0x01>;
+ reg = <0x00 CONCAT(0x,addr) 0xfffff>;
+ compatible = "ibm,power9-ex";
+ index = <$2>;
+
+')dnl
+
+dnl
+dnl CHIP([index])
+dnl
+define(`CHIP',
+`
+ mem$1 {
+ index = < 0x$1 >;
};
- proc0 {
+ proc$1 {
compatible = "ibm,power-proc", "ibm,power9-proc";
- index = < 0x00 >;
+ index = < 0x$1 >;
fsi {
- index = < 0x00 >;
+ index = < 0x$1 >;
};
pib {
#address-cells = < 0x02 >;
#size-cells = < 0x01 >;
- index = < 0x00 >;
+ index = < 0x$1 >;
adu at 90000 {
compatible = "ibm,power9-adu";
reg = < 0x00 0x90000 0x50 >;
- system-path = "/mem0";
+ system-path = "/mem$1";
};
htm at 5012880 {
compatible = "ibm,power9-nhtm";
reg = < 0x00 0x5012880 0x40 >;
- index = < 0x00 >;
+ index = < 0x$1 >;
};
htm at 50128C0 {
compatible = "ibm,power9-nhtm";
reg = < 0x00 0x50128c0 0x40 >;
- index = < 0x01 >;
+ index = < 0x$1 >;
};
- chiplet at 1000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x01 >;
- reg = < 0x00 0x1000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
+ CHIPLET_(1)
tp at 0 {
+ reg = < 0x00 0x1000000 0xfffff >;
compatible = "ibm,power9-tp";
index = < 0x00 >;
- reg = < 0x00 0x1000000 0xffffff >;
};
};
- chiplet at 2000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x02 >;
- reg = < 0x00 0x2000000 0xfffff >;
-
+ CHIPLET__(2)
n0 {
compatible = "ibm,power9-nest";
index = < 0x00 >;
@@ -67,11 +152,7 @@
};
};
- chiplet at 3000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x03 >;
- reg = < 0x00 0x3000000 0xfffff >;
-
+ CHIPLET__(3)
n1 {
compatible = "ibm,power9-nest";
index = < 0x01 >;
@@ -88,11 +169,7 @@
};
};
- chiplet at 4000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x04 >;
- reg = < 0x00 0x4000000 0xfffff >;
-
+ CHIPLET__(4)
n2 {
compatible = "ibm,power9-nest";
index = < 0x02 >;
@@ -104,11 +181,7 @@
};
};
- chiplet at 5000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x05 >;
- reg = < 0x00 0x5000000 0xfffff >;
-
+ CHIPLET__(5)
n3 {
compatible = "ibm,power9-nest";
index = < 0x03 >;
@@ -125,32 +198,19 @@
};
};
- chiplet at 6000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x06 >;
- reg = < 0x00 0x6000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- xbus at 0 {
+ CHIPLET_(6)
+ xbus$1_0: xbus at 0 {
compatible = "ibm,power9-xbus";
index = < 0x01 >;
- reg = < 0x00 0x6000000 0xffffff >;
- other-end = "/proc1/pib/chiplet at 6000000/xbus at 1";
+ reg = < 0x00 0x6000000 0xfffff >;
};
};
- chiplet at 7000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x07 >;
- reg = < 0x00 0x7000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
+ CHIPLET_(7)
mc at 0 {
+ reg = < 0x00 0x7000000 0xfffff >;
compatible = "ibm,power9-mc";
index = < 0x00 >;
- reg = < 0x00 0x7000000 0xffffff >;
mca0 {
compatible = "ibm,power9-mca";
@@ -179,17 +239,11 @@
};
};
- chiplet at 8000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x08 >;
- reg = < 0x00 0x8000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
+ CHIPLET_(8)
mc at 1 {
+ reg = < 0x00 0x8000000 0xfffff >;
compatible = "ibm,power9-mc";
index = < 0x01 >;
- reg = < 0x00 0x8000000 0xffffff >;
mca0 {
compatible = "ibm,power9-mca";
@@ -218,17 +272,11 @@
};
};
- chiplet at 9000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x09 >;
- reg = < 0x00 0x9000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
+ CHIPLET_(9)
obus at 0 {
+ reg = < 0x00 0x9000000 0xfffff >;
compatible = "ibm,power9-obus";
index = < 0x00 >;
- reg = < 0x00 0x9000000 0xffffff >;
};
obrick0 {
@@ -247,17 +295,11 @@
};
};
- chiplet at c000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x0c >;
- reg = < 0x00 0xc000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
+ CHIPLET_(c)
obus at 3 {
+ reg = < 0x00 0xc000000 0xfffff >;
compatible = "ibm,power9-obus";
index = < 0x03 >;
- reg = < 0x00 0xc000000 0xffffff >;
};
obrick0 {
@@ -276,17 +318,11 @@
};
};
- chiplet at d000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x0d >;
- reg = < 0x00 0xd000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
+ CHIPLET_(d)
pec at d000000 {
+ reg = < 0x00 0xd000000 0xfffff >;
compatible = "ibm,power9-pec";
index = < 0x00 >;
- reg = < 0x00 0xd000000 0xfffff >;
};
phb0 {
@@ -300,17 +336,11 @@
};
};
- chiplet at e000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x0e >;
- reg = < 0x00 0xe000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
+ CHIPLET_(e)
pec at e000000 {
+ reg = < 0x00 0xe000000 0xfffff >;
compatible = "ibm,power9-pec";
index = < 0x01 >;
- reg = < 0x00 0xe000000 0xfffff >;
};
phb0 {
@@ -324,17 +354,11 @@
};
};
- chiplet at f000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x0f >;
- reg = < 0x00 0xf000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
+ CHIPLET_(f)
pec at f000000 {
+ reg = < 0x00 0xf000000 0xfffff >;
compatible = "ibm,power9-pec";
index = < 0x02 >;
- reg = < 0x00 0xf000000 0xfffff >;
};
phb0 {
@@ -348,1249 +372,145 @@
};
};
- chiplet at 10000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x10 >;
- reg = < 0x00 0x10000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- eq at 0 {
- compatible = "ibm,power9-eq";
- index = < 0x00 >;
- reg = < 0x00 0x10000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- ex at 0 {
- compatible = "ibm,power9-ex";
- index = < 0x00 >;
- reg = < 0x00 0x10000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 20000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x20 >;
- reg = < 0x00 0x20000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x00 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(10)
+ EQ_(0)
+ EX_(0,0)
+ CHIPLET_(20)
+ CORE(00)
};
- chiplet at 21000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x21 >;
- reg = < 0x00 0x21000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x01 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(21)
+ CORE(01)
};
};
- ex at 1 {
- compatible = "ibm,power9-ex";
- index = < 0x01 >;
- reg = < 0x00 0x10000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 22000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x22 >;
- reg = < 0x00 0x22000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x02 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ EX_(0,1)
+ CHIPLET_(22)
+ CORE(02)
};
- chiplet at 23000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x23 >;
- reg = < 0x00 0x23000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x03 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(23)
+ CORE(03)
};
};
};
};
- chiplet at 11000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x11 >;
- reg = < 0x00 0x11000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- eq at 1 {
- compatible = "ibm,power9-eq";
- index = < 0x01 >;
- reg = < 0x00 0x11000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- ex at 0 {
- compatible = "ibm,power9-ex";
- index = < 0x00 >;
- reg = < 0x00 0x10000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 24000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x24 >;
- reg = < 0x00 0x24000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x04 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(11)
+ EQ_(1)
+ EX_(1,0)
+ CHIPLET_(24)
+ CORE(04)
};
- chiplet at 25000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x25 >;
- reg = < 0x00 0x25000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x05 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(25)
+ CORE(05)
};
};
- ex at 1 {
- compatible = "ibm,power9-ex";
- index = < 0x01 >;
- reg = < 0x00 0x10000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 26000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x26 >;
- reg = < 0x00 0x26000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x06 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ EX_(1,1)
+ CHIPLET_(26)
+ CORE(06)
};
- chiplet at 27000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x27 >;
- reg = < 0x00 0x27000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x07 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(27)
+ CORE(07)
};
};
};
};
- chiplet at 12000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x12 >;
- reg = < 0x00 0x12000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- eq at 2 {
- compatible = "ibm,power9-eq";
- index = < 0x02 >;
- reg = < 0x00 0x12000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- ex at 0 {
- compatible = "ibm,power9-ex";
- index = < 0x00 >;
- reg = < 0x00 0x12000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 28000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x28 >;
- reg = < 0x00 0x28000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x08 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(12)
+ EQ_(2)
+ EX_(2,0)
+ CHIPLET_(28)
+ CORE(08)
};
- chiplet at 29000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x29 >;
- reg = < 0x00 0x29000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x09 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(29)
+ CORE(09)
};
};
- ex at 1 {
- compatible = "ibm,power9-ex";
- index = < 0x01 >;
- reg = < 0x00 0x12000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 2a000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x2a >;
- reg = < 0x00 0x2a000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x0a >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ EX_(2,1)
+ CHIPLET_(2a)
+ CORE(0a)
};
- chiplet at 2b000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x2b >;
- reg = < 0x00 0x2b000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x0b >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(2b)
+ CORE(0b)
};
};
};
};
- chiplet at 13000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x13 >;
- reg = < 0x00 0x13000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- eq at 3 {
- compatible = "ibm,power9-eq";
- index = < 0x03 >;
- reg = < 0x00 0x13000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- ex at 0 {
- compatible = "ibm,power9-ex";
- index = < 0x00 >;
- reg = < 0x00 0x13000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 2c000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x2c >;
- reg = < 0x00 0x2c000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x0c >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(13)
+ EQ_(3)
+ EX_(3,0)
+ CHIPLET_(2c)
+ CORE(0c)
};
- chiplet at 2d000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x2d >;
- reg = < 0x00 0x2d000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x0d >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(2d)
+ CORE(0d)
};
};
- ex at 1 {
- compatible = "ibm,power9-ex";
- index = < 0x01 >;
- reg = < 0x00 0x13000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 2e000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x2e >;
- reg = < 0x00 0x2e000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x0e >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ EX_(3,1)
+ CHIPLET_(2e)
+ CORE(0e)
};
- chiplet at 2f000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x2f >;
- reg = < 0x00 0x2f000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x0f >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(2f)
+ CORE(0f)
};
};
};
};
- chiplet at 14000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x14 >;
- reg = < 0x00 0x14000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- eq at 4 {
- compatible = "ibm,power9-eq";
- index = < 0x04 >;
- reg = < 0x00 0x13000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- ex at 0 {
- compatible = "ibm,power9-ex";
- index = < 0x00 >;
- reg = < 0x00 0x14000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 30000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x30 >;
- reg = < 0x00 0x30000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x10 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(14)
+ EQ_(4)
+ EX_(4,0)
+ CHIPLET_(30)
+ CORE(10)
};
- chiplet at 31000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x31 >;
- reg = < 0x00 0x31000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x11 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(31)
+ CORE(11)
};
};
- ex at 1 {
- compatible = "ibm,power9-ex";
- index = < 0x01 >;
- reg = < 0x00 0x14000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 32000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x32 >;
- reg = < 0x00 0x32000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x12 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ EX_(4,1)
+ CHIPLET_(32)
+ CORE(12)
};
- chiplet at 33000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x33 >;
- reg = < 0x00 0x33000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x13 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(33)
+ CORE(13)
};
};
};
};
- chiplet at 15000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x15 >;
- reg = < 0x00 0x15000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- eq at 5 {
- compatible = "ibm,power9-eq";
- index = < 0x05 >;
- reg = < 0x00 0x13000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- ex at 0 {
- compatible = "ibm,power9-ex";
- index = < 0x00 >;
- reg = < 0x00 0x15000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 34000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x34 >;
- reg = < 0x00 0x34000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x14 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(15)
+ EQ_(5)
+ EX_(5,0)
+ CHIPLET_(34)
+ CORE(14)
};
- chiplet at 35000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x35 >;
- reg = < 0x00 0x35000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x15 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(35)
+ CORE(15)
};
};
- ex at 1 {
- compatible = "ibm,power9-ex";
- index = < 0x01 >;
- reg = < 0x00 0x15000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 36000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x36 >;
- reg = < 0x00 0x36000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x16 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ EX_(5,1)
+ CHIPLET_(36)
+ CORE(16)
};
- chiplet at 37000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x37 >;
- reg = < 0x00 0x37000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x17 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
+ CHIPLET_(37)
+ CORE(17)
};
};
};
@@ -1717,1720 +637,17 @@
};
};
};
+')dnl
- mem1 {
- index = < 0x01 >;
- };
-
- proc1 {
- compatible = "ibm,power-proc", "ibm,power9-proc";
- index = < 0x01 >;
-
- fsi {
- index = < 0x00 >;
- };
-
- pib {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- index = < 0x00 >;
-
- adu at 90000 {
- compatible = "ibm,power9-adu";
- reg = < 0x00 0x90000 0x50 >;
- system-path = "/mem1";
- };
-
- htm at 5012880 {
- compatible = "ibm,power9-nhtm";
- reg = < 0x00 0x5012880 0x40 >;
- index = < 0x00 >;
- };
-
- htm at 50128C0 {
- compatible = "ibm,power9-nhtm";
- reg = < 0x00 0x50128c0 0x40 >;
- index = < 0x01 >;
- };
-
- chiplet at 1000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x01 >;
- reg = < 0x00 0x1000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- tp at 0 {
- compatible = "ibm,power9-tp";
- index = < 0x00 >;
- reg = < 0x00 0x1000000 0xffffff >;
- };
- };
-
- chiplet at 2000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x02 >;
- reg = < 0x00 0x2000000 0xfffff >;
-
- n0 {
- compatible = "ibm,power9-nest";
- index = < 0x00 >;
-
- capp0 {
- compatible = "ibm,power9-capp";
- index = < 0x00 >;
- };
- };
- };
-
- chiplet at 3000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x03 >;
- reg = < 0x00 0x3000000 0xfffff >;
-
- n1 {
- compatible = "ibm,power9-nest";
- index = < 0x01 >;
-
- mcs2 {
- compatible = "ibm,power9-mcs";
- index = < 0x02 >;
- };
-
- mcs3 {
- compatible = "ibm,power9-mcs";
- index = < 0x03 >;
- };
- };
- };
-
- chiplet at 4000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x04 >;
- reg = < 0x00 0x4000000 0xfffff >;
-
- n2 {
- compatible = "ibm,power9-nest";
- index = < 0x02 >;
-
- capp1 {
- compatible = "ibm,power9-capp";
- index = < 0x01 >;
- };
- };
- };
-
- chiplet at 5000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x05 >;
- reg = < 0x00 0x5000000 0xfffff >;
-
- n3 {
- compatible = "ibm,power9-nest";
- index = < 0x03 >;
-
- mcs0 {
- compatible = "ibm,power9-mcs";
- index = < 0x00 >;
- };
-
- mcs1 {
- compatible = "ibm,power9-mcs";
- index = < 0x01 >;
- };
- };
- };
-
- chiplet at 6000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x06 >;
- reg = < 0x00 0x6000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- xbus at 0 {
- compatible = "ibm,power9-xbus";
- index = < 0x01 >;
- reg = < 0x00 0x6000000 0xffffff >;
- other-end = "/proc0/pib/chiplet at 6000000/xbus at 1";
- };
- };
-
- chiplet at 7000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x07 >;
- reg = < 0x00 0x7000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- mc at 0 {
- compatible = "ibm,power9-mc";
- index = < 0x00 >;
- reg = < 0x00 0x7000000 0xffffff >;
-
- mca0 {
- compatible = "ibm,power9-mca";
- index = < 0x00 >;
- };
-
- mca1 {
- compatible = "ibm,power9-mca";
- index = < 0x01 >;
- };
-
- mca2 {
- compatible = "ibm,power9-mca";
- index = < 0x02 >;
- };
-
- mca3 {
- compatible = "ibm,power9-mca";
- index = < 0x03 >;
- };
-
- mcbist {
- compatible = "ibm,power9-mcbist";
- index = < 0x00 >;
- };
- };
- };
-
- chiplet at 8000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x08 >;
- reg = < 0x00 0x8000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- mc at 1 {
- compatible = "ibm,power9-mc";
- index = < 0x01 >;
- reg = < 0x00 0x8000000 0xffffff >;
-
- mca0 {
- compatible = "ibm,power9-mca";
- index = < 0x04 >;
- };
-
- mca1 {
- compatible = "ibm,power9-mca";
- index = < 0x05 >;
- };
-
- mca2 {
- compatible = "ibm,power9-mca";
- index = < 0x06 >;
- };
-
- mca3 {
- compatible = "ibm,power9-mca";
- index = < 0x07 >;
- };
-
- mcbist {
- compatible = "ibm,power9-mcbist";
- index = < 0x01 >;
- };
- };
- };
-
- chiplet at 9000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x09 >;
- reg = < 0x00 0x9000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- obus at 0 {
- compatible = "ibm,power9-obus";
- index = < 0x00 >;
- reg = < 0x00 0x9000000 0xffffff >;
- };
-
- obrick0 {
- compatible = "ibm,power9-obus_brick";
- index = < 0x00 >;
- };
-
- obrick1 {
- compatible = "ibm,power9-obus_brick";
- index = < 0x01 >;
- };
-
- obrick2 {
- compatible = "ibm,power9-obus_brick";
- index = < 0x02 >;
- };
- };
-
- chiplet at c000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x0c >;
- reg = < 0x00 0xc000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
+/dts-v1/;
- obus at 3 {
- compatible = "ibm,power9-obus";
- index = < 0x03 >;
- reg = < 0x00 0xc000000 0xffffff >;
- };
-
- obrick0 {
- compatible = "ibm,power9-obus_brick";
- index = < 0x09 >;
- };
-
- obrick1 {
- compatible = "ibm,power9-obus_brick";
- index = < 0x0a >;
- };
-
- obrick2 {
- compatible = "ibm,power9-obus_brick";
- index = < 0x0b >;
- };
- };
-
- chiplet at d000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x0d >;
- reg = < 0x00 0xd000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- pec at d000000 {
- compatible = "ibm,power9-pec";
- index = < 0x00 >;
- reg = < 0x00 0xd000000 0xfffff >;
- };
-
- phb0 {
- compatible = "ibm,power9-phb";
- index = < 0x00 >;
- };
-
- phb1 {
- compatible = "ibm,power9-phb";
- index = < 0x01 >;
- };
- };
-
- chiplet at e000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x0e >;
- reg = < 0x00 0xe000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- pec at e000000 {
- compatible = "ibm,power9-pec";
- index = < 0x01 >;
- reg = < 0x00 0xe000000 0xfffff >;
- };
-
- phb0 {
- compatible = "ibm,power9-phb";
- index = < 0x02 >;
- };
-
- phb1 {
- compatible = "ibm,power9-phb";
- index = < 0x03 >;
- };
- };
-
- chiplet at f000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x0f >;
- reg = < 0x00 0xf000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- pec at f000000 {
- compatible = "ibm,power9-pec";
- index = < 0x02 >;
- reg = < 0x00 0xf000000 0xfffff >;
- };
-
- phb0 {
- compatible = "ibm,power9-phb";
- index = < 0x04 >;
- };
-
- phb1 {
- compatible = "ibm,power9-phb";
- index = < 0x05 >;
- };
- };
-
- chiplet at 10000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x10 >;
- reg = < 0x00 0x10000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- eq at 0 {
- compatible = "ibm,power9-eq";
- index = < 0x00 >;
- reg = < 0x00 0x10000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- ex at 0 {
- compatible = "ibm,power9-ex";
- index = < 0x00 >;
- reg = < 0x00 0x10000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 20000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x20 >;
- reg = < 0x00 0x20000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x00 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
-
- chiplet at 21000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x21 >;
- reg = < 0x00 0x21000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x01 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
- };
-
- ex at 1 {
- compatible = "ibm,power9-ex";
- index = < 0x01 >;
- reg = < 0x00 0x10000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 22000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x22 >;
- reg = < 0x00 0x22000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x02 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
-
- chiplet at 23000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x23 >;
- reg = < 0x00 0x23000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x03 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
- };
- };
- };
-
- chiplet at 11000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x11 >;
- reg = < 0x00 0x11000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- eq at 1 {
- compatible = "ibm,power9-eq";
- index = < 0x01 >;
- reg = < 0x00 0x11000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- ex at 0 {
- compatible = "ibm,power9-ex";
- index = < 0x00 >;
- reg = < 0x00 0x10000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 24000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x24 >;
- reg = < 0x00 0x24000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x04 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
-
- chiplet at 25000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x25 >;
- reg = < 0x00 0x25000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x05 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
- };
-
- ex at 1 {
- compatible = "ibm,power9-ex";
- index = < 0x01 >;
- reg = < 0x00 0x10000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 26000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x26 >;
- reg = < 0x00 0x26000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x06 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
-
- chiplet at 27000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x27 >;
- reg = < 0x00 0x27000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x07 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
- };
- };
- };
-
- chiplet at 12000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x12 >;
- reg = < 0x00 0x12000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- eq at 2 {
- compatible = "ibm,power9-eq";
- index = < 0x02 >;
- reg = < 0x00 0x12000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- ex at 0 {
- compatible = "ibm,power9-ex";
- index = < 0x00 >;
- reg = < 0x00 0x12000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 28000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x28 >;
- reg = < 0x00 0x28000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x08 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
-
- chiplet at 29000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x29 >;
- reg = < 0x00 0x29000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x09 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
- };
-
- ex at 1 {
- compatible = "ibm,power9-ex";
- index = < 0x01 >;
- reg = < 0x00 0x12000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 2a000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x2a >;
- reg = < 0x00 0x2a000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x0a >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
-
- chiplet at 2b000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x2b >;
- reg = < 0x00 0x2b000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x0b >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
- };
- };
- };
-
- chiplet at 13000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x13 >;
- reg = < 0x00 0x13000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- eq at 3 {
- compatible = "ibm,power9-eq";
- index = < 0x03 >;
- reg = < 0x00 0x13000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- ex at 0 {
- compatible = "ibm,power9-ex";
- index = < 0x00 >;
- reg = < 0x00 0x13000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 2c000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x2c >;
- reg = < 0x00 0x2c000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x0c >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
-
- chiplet at 2d000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x2d >;
- reg = < 0x00 0x2d000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x0d >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
- };
-
- ex at 1 {
- compatible = "ibm,power9-ex";
- index = < 0x01 >;
- reg = < 0x00 0x13000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 2e000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x2e >;
- reg = < 0x00 0x2e000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x0e >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
-
- chiplet at 2f000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x2f >;
- reg = < 0x00 0x2f000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x0f >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
- };
- };
- };
-
- chiplet at 14000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x14 >;
- reg = < 0x00 0x14000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- eq at 4 {
- compatible = "ibm,power9-eq";
- index = < 0x04 >;
- reg = < 0x00 0x13000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- ex at 0 {
- compatible = "ibm,power9-ex";
- index = < 0x00 >;
- reg = < 0x00 0x14000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 30000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x30 >;
- reg = < 0x00 0x30000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x10 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
-
- chiplet at 31000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x31 >;
- reg = < 0x00 0x31000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x11 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
- };
-
- ex at 1 {
- compatible = "ibm,power9-ex";
- index = < 0x01 >;
- reg = < 0x00 0x14000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 32000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x32 >;
- reg = < 0x00 0x32000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x12 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
-
- chiplet at 33000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x33 >;
- reg = < 0x00 0x33000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x13 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
- };
- };
- };
-
- chiplet at 15000000 {
- compatible = "ibm,power9-chiplet";
- index = < 0x15 >;
- reg = < 0x00 0x15000000 0xfffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- eq at 5 {
- compatible = "ibm,power9-eq";
- index = < 0x05 >;
- reg = < 0x00 0x13000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- ex at 0 {
- compatible = "ibm,power9-ex";
- index = < 0x00 >;
- reg = < 0x00 0x15000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 34000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x34 >;
- reg = < 0x00 0x34000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x14 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
-
- chiplet at 35000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x35 >;
- reg = < 0x00 0x35000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x15 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
- };
-
- ex at 1 {
- compatible = "ibm,power9-ex";
- index = < 0x01 >;
- reg = < 0x00 0x15000000 0xffffff >;
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
-
- chiplet at 36000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x36 >;
- reg = < 0x00 0x36000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x16 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
-
- chiplet at 37000000 {
- #address-cells = < 0x02 >;
- #size-cells = < 0x01 >;
- compatible = "ibm,power9-chiplet";
- index = < 0x37 >;
- reg = < 0x00 0x37000000 0xfffff >;
-
- core at 0 {
- #address-cells = < 0x01 >;
- #size-cells = < 0x00 >;
- compatible = "ibm,power-core", "ibm,power9-core";
- index = < 0x17 >;
- reg = < 0x00 0x00 0xfffff >;
-
- thread at 0 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x00 >;
- index = < 0x00 >;
- };
-
- thread at 1 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x01 >;
- index = < 0x01 >;
- };
-
- thread at 2 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x02 >;
- index = < 0x02 >;
- };
-
- thread at 3 {
- compatible = "ibm,power-thread", "ibm,power9-thread";
- reg = < 0x00 >;
- tid = < 0x03 >;
- index = < 0x03 >;
- };
- };
- };
- };
- };
- };
-
- nv0 {
- compatible = "ibm,power9-nv";
- index = < 0x00 >;
- };
-
- nv1 {
- compatible = "ibm,power9-nv";
- index = < 0x01 >;
- };
-
- nv2 {
- compatible = "ibm,power9-nv";
- index = < 0x02 >;
- };
-
- nv3 {
- compatible = "ibm,power9-nv";
- index = < 0x03 >;
- };
-
- nv4 {
- compatible = "ibm,power9-nv";
- index = < 0x04 >;
- };
-
- nv5 {
- compatible = "ibm,power9-nv";
- index = < 0x05 >;
- };
-
- occ0 {
- compatible = "ibm,power9-occ";
- index = < 0x00 >;
- };
-
- sbe0 {
- compatible = "ibm,power9-sbe";
- index = < 0x00 >;
- };
-
- ppe0 {
- compatible = "ibm,power9-ppe";
- index = < 0x00 >;
- };
-
- ppe1 {
- compatible = "ibm,power9-ppe";
- index = < 0x0a >;
- };
-
- ppe2 {
- compatible = "ibm,power9-ppe";
- index = < 0x0d >;
- };
-
- ppe3 {
- compatible = "ibm,power9-ppe";
- index = < 0x14 >;
- };
-
- ppe4 {
- compatible = "ibm,power9-ppe";
- index = < 0x19 >;
- };
-
- ppe5 {
- compatible = "ibm,power9-ppe";
- index = < 0x1e >;
- };
-
- ppe6 {
- compatible = "ibm,power9-ppe";
- index = < 0x28 >;
- };
-
- ppe7 {
- compatible = "ibm,power9-ppe";
- index = < 0x29 >;
- };
-
- ppe8 {
- compatible = "ibm,power9-ppe";
- index = < 0x2a >;
- };
-
- ppe9 {
- compatible = "ibm,power9-ppe";
- index = < 0x2b >;
- };
-
- ppe10 {
- compatible = "ibm,power9-ppe";
- index = < 0x2c >;
- };
-
- ppe11 {
- compatible = "ibm,power9-ppe";
- index = < 0x2d >;
- };
-
- ppe12 {
- compatible = "ibm,power9-ppe";
- index = < 0x2e >;
- };
-
- ppe13 {
- compatible = "ibm,power9-ppe";
- index = < 0x32 >;
- };
-
- ppe14 {
- compatible = "ibm,power9-ppe";
- index = < 0x34 >;
- };
-
- ppe15 {
- compatible = "ibm,power9-ppe";
- index = < 0x38 >;
- };
- };
- };
+/ {
+ CHIP(0)
+ CHIP(1)
+ CHIP(2)
+ CHIP(3)
+ CHIP(4)
+ CHIP(5)
+ CHIP(6)
+ CHIP(7)
};
diff --git a/tests/test_p9_fapi_translation.sh b/tests/test_p9_fapi_translation.sh
index fbb194d..8f44953 100755
--- a/tests/test_p9_fapi_translation.sh
+++ b/tests/test_p9_fapi_translation.sh
@@ -56,6 +56,150 @@ Testing /proc1/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 34000000/core at 0 20
Testing /proc1/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 35000000/core at 0 21
Testing /proc1/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 36000000/core at 0 22
Testing /proc1/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 37000000/core at 0 23
+Testing /proc2/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 20000000/core at 0 0
+Testing /proc2/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 21000000/core at 0 1
+Testing /proc2/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 22000000/core at 0 2
+Testing /proc2/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 23000000/core at 0 3
+Testing /proc2/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 24000000/core at 0 4
+Testing /proc2/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 25000000/core at 0 5
+Testing /proc2/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 26000000/core at 0 6
+Testing /proc2/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 27000000/core at 0 7
+Testing /proc2/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 28000000/core at 0 8
+Testing /proc2/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 29000000/core at 0 9
+Testing /proc2/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2a000000/core at 0 10
+Testing /proc2/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2b000000/core at 0 11
+Testing /proc2/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2c000000/core at 0 12
+Testing /proc2/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2d000000/core at 0 13
+Testing /proc2/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2e000000/core at 0 14
+Testing /proc2/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2f000000/core at 0 15
+Testing /proc2/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 30000000/core at 0 16
+Testing /proc2/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 31000000/core at 0 17
+Testing /proc2/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 32000000/core at 0 18
+Testing /proc2/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 33000000/core at 0 19
+Testing /proc2/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 34000000/core at 0 20
+Testing /proc2/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 35000000/core at 0 21
+Testing /proc2/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 36000000/core at 0 22
+Testing /proc2/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 37000000/core at 0 23
+Testing /proc3/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 20000000/core at 0 0
+Testing /proc3/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 21000000/core at 0 1
+Testing /proc3/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 22000000/core at 0 2
+Testing /proc3/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 23000000/core at 0 3
+Testing /proc3/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 24000000/core at 0 4
+Testing /proc3/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 25000000/core at 0 5
+Testing /proc3/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 26000000/core at 0 6
+Testing /proc3/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 27000000/core at 0 7
+Testing /proc3/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 28000000/core at 0 8
+Testing /proc3/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 29000000/core at 0 9
+Testing /proc3/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2a000000/core at 0 10
+Testing /proc3/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2b000000/core at 0 11
+Testing /proc3/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2c000000/core at 0 12
+Testing /proc3/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2d000000/core at 0 13
+Testing /proc3/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2e000000/core at 0 14
+Testing /proc3/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2f000000/core at 0 15
+Testing /proc3/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 30000000/core at 0 16
+Testing /proc3/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 31000000/core at 0 17
+Testing /proc3/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 32000000/core at 0 18
+Testing /proc3/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 33000000/core at 0 19
+Testing /proc3/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 34000000/core at 0 20
+Testing /proc3/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 35000000/core at 0 21
+Testing /proc3/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 36000000/core at 0 22
+Testing /proc3/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 37000000/core at 0 23
+Testing /proc4/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 20000000/core at 0 0
+Testing /proc4/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 21000000/core at 0 1
+Testing /proc4/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 22000000/core at 0 2
+Testing /proc4/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 23000000/core at 0 3
+Testing /proc4/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 24000000/core at 0 4
+Testing /proc4/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 25000000/core at 0 5
+Testing /proc4/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 26000000/core at 0 6
+Testing /proc4/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 27000000/core at 0 7
+Testing /proc4/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 28000000/core at 0 8
+Testing /proc4/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 29000000/core at 0 9
+Testing /proc4/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2a000000/core at 0 10
+Testing /proc4/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2b000000/core at 0 11
+Testing /proc4/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2c000000/core at 0 12
+Testing /proc4/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2d000000/core at 0 13
+Testing /proc4/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2e000000/core at 0 14
+Testing /proc4/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2f000000/core at 0 15
+Testing /proc4/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 30000000/core at 0 16
+Testing /proc4/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 31000000/core at 0 17
+Testing /proc4/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 32000000/core at 0 18
+Testing /proc4/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 33000000/core at 0 19
+Testing /proc4/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 34000000/core at 0 20
+Testing /proc4/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 35000000/core at 0 21
+Testing /proc4/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 36000000/core at 0 22
+Testing /proc4/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 37000000/core at 0 23
+Testing /proc5/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 20000000/core at 0 0
+Testing /proc5/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 21000000/core at 0 1
+Testing /proc5/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 22000000/core at 0 2
+Testing /proc5/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 23000000/core at 0 3
+Testing /proc5/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 24000000/core at 0 4
+Testing /proc5/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 25000000/core at 0 5
+Testing /proc5/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 26000000/core at 0 6
+Testing /proc5/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 27000000/core at 0 7
+Testing /proc5/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 28000000/core at 0 8
+Testing /proc5/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 29000000/core at 0 9
+Testing /proc5/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2a000000/core at 0 10
+Testing /proc5/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2b000000/core at 0 11
+Testing /proc5/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2c000000/core at 0 12
+Testing /proc5/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2d000000/core at 0 13
+Testing /proc5/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2e000000/core at 0 14
+Testing /proc5/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2f000000/core at 0 15
+Testing /proc5/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 30000000/core at 0 16
+Testing /proc5/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 31000000/core at 0 17
+Testing /proc5/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 32000000/core at 0 18
+Testing /proc5/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 33000000/core at 0 19
+Testing /proc5/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 34000000/core at 0 20
+Testing /proc5/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 35000000/core at 0 21
+Testing /proc5/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 36000000/core at 0 22
+Testing /proc5/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 37000000/core at 0 23
+Testing /proc6/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 20000000/core at 0 0
+Testing /proc6/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 21000000/core at 0 1
+Testing /proc6/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 22000000/core at 0 2
+Testing /proc6/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 23000000/core at 0 3
+Testing /proc6/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 24000000/core at 0 4
+Testing /proc6/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 25000000/core at 0 5
+Testing /proc6/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 26000000/core at 0 6
+Testing /proc6/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 27000000/core at 0 7
+Testing /proc6/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 28000000/core at 0 8
+Testing /proc6/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 29000000/core at 0 9
+Testing /proc6/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2a000000/core at 0 10
+Testing /proc6/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2b000000/core at 0 11
+Testing /proc6/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2c000000/core at 0 12
+Testing /proc6/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2d000000/core at 0 13
+Testing /proc6/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2e000000/core at 0 14
+Testing /proc6/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2f000000/core at 0 15
+Testing /proc6/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 30000000/core at 0 16
+Testing /proc6/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 31000000/core at 0 17
+Testing /proc6/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 32000000/core at 0 18
+Testing /proc6/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 33000000/core at 0 19
+Testing /proc6/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 34000000/core at 0 20
+Testing /proc6/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 35000000/core at 0 21
+Testing /proc6/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 36000000/core at 0 22
+Testing /proc6/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 37000000/core at 0 23
+Testing /proc7/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 20000000/core at 0 0
+Testing /proc7/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 21000000/core at 0 1
+Testing /proc7/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 22000000/core at 0 2
+Testing /proc7/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 23000000/core at 0 3
+Testing /proc7/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 24000000/core at 0 4
+Testing /proc7/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 25000000/core at 0 5
+Testing /proc7/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 26000000/core at 0 6
+Testing /proc7/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 27000000/core at 0 7
+Testing /proc7/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 28000000/core at 0 8
+Testing /proc7/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 29000000/core at 0 9
+Testing /proc7/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2a000000/core at 0 10
+Testing /proc7/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2b000000/core at 0 11
+Testing /proc7/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2c000000/core at 0 12
+Testing /proc7/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2d000000/core at 0 13
+Testing /proc7/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2e000000/core at 0 14
+Testing /proc7/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2f000000/core at 0 15
+Testing /proc7/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 30000000/core at 0 16
+Testing /proc7/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 31000000/core at 0 17
+Testing /proc7/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 32000000/core at 0 18
+Testing /proc7/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 33000000/core at 0 19
+Testing /proc7/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 34000000/core at 0 20
+Testing /proc7/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 35000000/core at 0 21
+Testing /proc7/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 36000000/core at 0 22
+Testing /proc7/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 37000000/core at 0 23
EOF
test_run libpdbg_p9_fapi_translation_test core
@@ -74,6 +218,42 @@ Testing /proc1/pib/chiplet at 12000000/eq at 2 2
Testing /proc1/pib/chiplet at 13000000/eq at 3 3
Testing /proc1/pib/chiplet at 14000000/eq at 4 4
Testing /proc1/pib/chiplet at 15000000/eq at 5 5
+Testing /proc2/pib/chiplet at 10000000/eq at 0 0
+Testing /proc2/pib/chiplet at 11000000/eq at 1 1
+Testing /proc2/pib/chiplet at 12000000/eq at 2 2
+Testing /proc2/pib/chiplet at 13000000/eq at 3 3
+Testing /proc2/pib/chiplet at 14000000/eq at 4 4
+Testing /proc2/pib/chiplet at 15000000/eq at 5 5
+Testing /proc3/pib/chiplet at 10000000/eq at 0 0
+Testing /proc3/pib/chiplet at 11000000/eq at 1 1
+Testing /proc3/pib/chiplet at 12000000/eq at 2 2
+Testing /proc3/pib/chiplet at 13000000/eq at 3 3
+Testing /proc3/pib/chiplet at 14000000/eq at 4 4
+Testing /proc3/pib/chiplet at 15000000/eq at 5 5
+Testing /proc4/pib/chiplet at 10000000/eq at 0 0
+Testing /proc4/pib/chiplet at 11000000/eq at 1 1
+Testing /proc4/pib/chiplet at 12000000/eq at 2 2
+Testing /proc4/pib/chiplet at 13000000/eq at 3 3
+Testing /proc4/pib/chiplet at 14000000/eq at 4 4
+Testing /proc4/pib/chiplet at 15000000/eq at 5 5
+Testing /proc5/pib/chiplet at 10000000/eq at 0 0
+Testing /proc5/pib/chiplet at 11000000/eq at 1 1
+Testing /proc5/pib/chiplet at 12000000/eq at 2 2
+Testing /proc5/pib/chiplet at 13000000/eq at 3 3
+Testing /proc5/pib/chiplet at 14000000/eq at 4 4
+Testing /proc5/pib/chiplet at 15000000/eq at 5 5
+Testing /proc6/pib/chiplet at 10000000/eq at 0 0
+Testing /proc6/pib/chiplet at 11000000/eq at 1 1
+Testing /proc6/pib/chiplet at 12000000/eq at 2 2
+Testing /proc6/pib/chiplet at 13000000/eq at 3 3
+Testing /proc6/pib/chiplet at 14000000/eq at 4 4
+Testing /proc6/pib/chiplet at 15000000/eq at 5 5
+Testing /proc7/pib/chiplet at 10000000/eq at 0 0
+Testing /proc7/pib/chiplet at 11000000/eq at 1 1
+Testing /proc7/pib/chiplet at 12000000/eq at 2 2
+Testing /proc7/pib/chiplet at 13000000/eq at 3 3
+Testing /proc7/pib/chiplet at 14000000/eq at 4 4
+Testing /proc7/pib/chiplet at 15000000/eq at 5 5
EOF
test_run libpdbg_p9_fapi_translation_test eq
@@ -104,6 +284,78 @@ Testing /proc1/pib/chiplet at 14000000/eq at 4/ex at 0 0
Testing /proc1/pib/chiplet at 14000000/eq at 4/ex at 1 1
Testing /proc1/pib/chiplet at 15000000/eq at 5/ex at 0 0
Testing /proc1/pib/chiplet at 15000000/eq at 5/ex at 1 1
+Testing /proc2/pib/chiplet at 10000000/eq at 0/ex at 0 0
+Testing /proc2/pib/chiplet at 10000000/eq at 0/ex at 1 1
+Testing /proc2/pib/chiplet at 11000000/eq at 1/ex at 0 0
+Testing /proc2/pib/chiplet at 11000000/eq at 1/ex at 1 1
+Testing /proc2/pib/chiplet at 12000000/eq at 2/ex at 0 0
+Testing /proc2/pib/chiplet at 12000000/eq at 2/ex at 1 1
+Testing /proc2/pib/chiplet at 13000000/eq at 3/ex at 0 0
+Testing /proc2/pib/chiplet at 13000000/eq at 3/ex at 1 1
+Testing /proc2/pib/chiplet at 14000000/eq at 4/ex at 0 0
+Testing /proc2/pib/chiplet at 14000000/eq at 4/ex at 1 1
+Testing /proc2/pib/chiplet at 15000000/eq at 5/ex at 0 0
+Testing /proc2/pib/chiplet at 15000000/eq at 5/ex at 1 1
+Testing /proc3/pib/chiplet at 10000000/eq at 0/ex at 0 0
+Testing /proc3/pib/chiplet at 10000000/eq at 0/ex at 1 1
+Testing /proc3/pib/chiplet at 11000000/eq at 1/ex at 0 0
+Testing /proc3/pib/chiplet at 11000000/eq at 1/ex at 1 1
+Testing /proc3/pib/chiplet at 12000000/eq at 2/ex at 0 0
+Testing /proc3/pib/chiplet at 12000000/eq at 2/ex at 1 1
+Testing /proc3/pib/chiplet at 13000000/eq at 3/ex at 0 0
+Testing /proc3/pib/chiplet at 13000000/eq at 3/ex at 1 1
+Testing /proc3/pib/chiplet at 14000000/eq at 4/ex at 0 0
+Testing /proc3/pib/chiplet at 14000000/eq at 4/ex at 1 1
+Testing /proc3/pib/chiplet at 15000000/eq at 5/ex at 0 0
+Testing /proc3/pib/chiplet at 15000000/eq at 5/ex at 1 1
+Testing /proc4/pib/chiplet at 10000000/eq at 0/ex at 0 0
+Testing /proc4/pib/chiplet at 10000000/eq at 0/ex at 1 1
+Testing /proc4/pib/chiplet at 11000000/eq at 1/ex at 0 0
+Testing /proc4/pib/chiplet at 11000000/eq at 1/ex at 1 1
+Testing /proc4/pib/chiplet at 12000000/eq at 2/ex at 0 0
+Testing /proc4/pib/chiplet at 12000000/eq at 2/ex at 1 1
+Testing /proc4/pib/chiplet at 13000000/eq at 3/ex at 0 0
+Testing /proc4/pib/chiplet at 13000000/eq at 3/ex at 1 1
+Testing /proc4/pib/chiplet at 14000000/eq at 4/ex at 0 0
+Testing /proc4/pib/chiplet at 14000000/eq at 4/ex at 1 1
+Testing /proc4/pib/chiplet at 15000000/eq at 5/ex at 0 0
+Testing /proc4/pib/chiplet at 15000000/eq at 5/ex at 1 1
+Testing /proc5/pib/chiplet at 10000000/eq at 0/ex at 0 0
+Testing /proc5/pib/chiplet at 10000000/eq at 0/ex at 1 1
+Testing /proc5/pib/chiplet at 11000000/eq at 1/ex at 0 0
+Testing /proc5/pib/chiplet at 11000000/eq at 1/ex at 1 1
+Testing /proc5/pib/chiplet at 12000000/eq at 2/ex at 0 0
+Testing /proc5/pib/chiplet at 12000000/eq at 2/ex at 1 1
+Testing /proc5/pib/chiplet at 13000000/eq at 3/ex at 0 0
+Testing /proc5/pib/chiplet at 13000000/eq at 3/ex at 1 1
+Testing /proc5/pib/chiplet at 14000000/eq at 4/ex at 0 0
+Testing /proc5/pib/chiplet at 14000000/eq at 4/ex at 1 1
+Testing /proc5/pib/chiplet at 15000000/eq at 5/ex at 0 0
+Testing /proc5/pib/chiplet at 15000000/eq at 5/ex at 1 1
+Testing /proc6/pib/chiplet at 10000000/eq at 0/ex at 0 0
+Testing /proc6/pib/chiplet at 10000000/eq at 0/ex at 1 1
+Testing /proc6/pib/chiplet at 11000000/eq at 1/ex at 0 0
+Testing /proc6/pib/chiplet at 11000000/eq at 1/ex at 1 1
+Testing /proc6/pib/chiplet at 12000000/eq at 2/ex at 0 0
+Testing /proc6/pib/chiplet at 12000000/eq at 2/ex at 1 1
+Testing /proc6/pib/chiplet at 13000000/eq at 3/ex at 0 0
+Testing /proc6/pib/chiplet at 13000000/eq at 3/ex at 1 1
+Testing /proc6/pib/chiplet at 14000000/eq at 4/ex at 0 0
+Testing /proc6/pib/chiplet at 14000000/eq at 4/ex at 1 1
+Testing /proc6/pib/chiplet at 15000000/eq at 5/ex at 0 0
+Testing /proc6/pib/chiplet at 15000000/eq at 5/ex at 1 1
+Testing /proc7/pib/chiplet at 10000000/eq at 0/ex at 0 0
+Testing /proc7/pib/chiplet at 10000000/eq at 0/ex at 1 1
+Testing /proc7/pib/chiplet at 11000000/eq at 1/ex at 0 0
+Testing /proc7/pib/chiplet at 11000000/eq at 1/ex at 1 1
+Testing /proc7/pib/chiplet at 12000000/eq at 2/ex at 0 0
+Testing /proc7/pib/chiplet at 12000000/eq at 2/ex at 1 1
+Testing /proc7/pib/chiplet at 13000000/eq at 3/ex at 0 0
+Testing /proc7/pib/chiplet at 13000000/eq at 3/ex at 1 1
+Testing /proc7/pib/chiplet at 14000000/eq at 4/ex at 0 0
+Testing /proc7/pib/chiplet at 14000000/eq at 4/ex at 1 1
+Testing /proc7/pib/chiplet at 15000000/eq at 5/ex at 0 0
+Testing /proc7/pib/chiplet at 15000000/eq at 5/ex at 1 1
EOF
test_run libpdbg_p9_fapi_translation_test ex
@@ -112,6 +364,12 @@ test_run libpdbg_p9_fapi_translation_test ex
test_result 0 <<EOF
Testing /proc0/pib/chiplet at 6000000/xbus at 0 1
Testing /proc1/pib/chiplet at 6000000/xbus at 0 1
+Testing /proc2/pib/chiplet at 6000000/xbus at 0 1
+Testing /proc3/pib/chiplet at 6000000/xbus at 0 1
+Testing /proc4/pib/chiplet at 6000000/xbus at 0 1
+Testing /proc5/pib/chiplet at 6000000/xbus at 0 1
+Testing /proc6/pib/chiplet at 6000000/xbus at 0 1
+Testing /proc7/pib/chiplet at 6000000/xbus at 0 1
EOF
test_run libpdbg_p9_fapi_translation_test xbus
@@ -122,6 +380,18 @@ Testing /proc0/pib/chiplet at 9000000/obus at 0 0
Testing /proc0/pib/chiplet at c000000/obus at 3 3
Testing /proc1/pib/chiplet at 9000000/obus at 0 0
Testing /proc1/pib/chiplet at c000000/obus at 3 3
+Testing /proc2/pib/chiplet at 9000000/obus at 0 0
+Testing /proc2/pib/chiplet at c000000/obus at 3 3
+Testing /proc3/pib/chiplet at 9000000/obus at 0 0
+Testing /proc3/pib/chiplet at c000000/obus at 3 3
+Testing /proc4/pib/chiplet at 9000000/obus at 0 0
+Testing /proc4/pib/chiplet at c000000/obus at 3 3
+Testing /proc5/pib/chiplet at 9000000/obus at 0 0
+Testing /proc5/pib/chiplet at c000000/obus at 3 3
+Testing /proc6/pib/chiplet at 9000000/obus at 0 0
+Testing /proc6/pib/chiplet at c000000/obus at 3 3
+Testing /proc7/pib/chiplet at 9000000/obus at 0 0
+Testing /proc7/pib/chiplet at c000000/obus at 3 3
EOF
test_run libpdbg_p9_fapi_translation_test obus
@@ -141,6 +411,24 @@ Testing /proc0/pib/chiplet at f000000/pec at f000000 2
Testing /proc1/pib/chiplet at d000000/pec at d000000 0
Testing /proc1/pib/chiplet at e000000/pec at e000000 1
Testing /proc1/pib/chiplet at f000000/pec at f000000 2
+Testing /proc2/pib/chiplet at d000000/pec at d000000 0
+Testing /proc2/pib/chiplet at e000000/pec at e000000 1
+Testing /proc2/pib/chiplet at f000000/pec at f000000 2
+Testing /proc3/pib/chiplet at d000000/pec at d000000 0
+Testing /proc3/pib/chiplet at e000000/pec at e000000 1
+Testing /proc3/pib/chiplet at f000000/pec at f000000 2
+Testing /proc4/pib/chiplet at d000000/pec at d000000 0
+Testing /proc4/pib/chiplet at e000000/pec at e000000 1
+Testing /proc4/pib/chiplet at f000000/pec at f000000 2
+Testing /proc5/pib/chiplet at d000000/pec at d000000 0
+Testing /proc5/pib/chiplet at e000000/pec at e000000 1
+Testing /proc5/pib/chiplet at f000000/pec at f000000 2
+Testing /proc6/pib/chiplet at d000000/pec at d000000 0
+Testing /proc6/pib/chiplet at e000000/pec at e000000 1
+Testing /proc6/pib/chiplet at f000000/pec at f000000 2
+Testing /proc7/pib/chiplet at d000000/pec at d000000 0
+Testing /proc7/pib/chiplet at e000000/pec at e000000 1
+Testing /proc7/pib/chiplet at f000000/pec at f000000 2
EOF
test_run libpdbg_p9_fapi_translation_test pec
@@ -159,6 +447,42 @@ Testing /proc1/pib/chiplet at e000000/phb0 2
Testing /proc1/pib/chiplet at e000000/phb1 3
Testing /proc1/pib/chiplet at f000000/phb0 4
Testing /proc1/pib/chiplet at f000000/phb1 5
+Testing /proc2/pib/chiplet at d000000/phb0 0
+Testing /proc2/pib/chiplet at d000000/phb1 1
+Testing /proc2/pib/chiplet at e000000/phb0 2
+Testing /proc2/pib/chiplet at e000000/phb1 3
+Testing /proc2/pib/chiplet at f000000/phb0 4
+Testing /proc2/pib/chiplet at f000000/phb1 5
+Testing /proc3/pib/chiplet at d000000/phb0 0
+Testing /proc3/pib/chiplet at d000000/phb1 1
+Testing /proc3/pib/chiplet at e000000/phb0 2
+Testing /proc3/pib/chiplet at e000000/phb1 3
+Testing /proc3/pib/chiplet at f000000/phb0 4
+Testing /proc3/pib/chiplet at f000000/phb1 5
+Testing /proc4/pib/chiplet at d000000/phb0 0
+Testing /proc4/pib/chiplet at d000000/phb1 1
+Testing /proc4/pib/chiplet at e000000/phb0 2
+Testing /proc4/pib/chiplet at e000000/phb1 3
+Testing /proc4/pib/chiplet at f000000/phb0 4
+Testing /proc4/pib/chiplet at f000000/phb1 5
+Testing /proc5/pib/chiplet at d000000/phb0 0
+Testing /proc5/pib/chiplet at d000000/phb1 1
+Testing /proc5/pib/chiplet at e000000/phb0 2
+Testing /proc5/pib/chiplet at e000000/phb1 3
+Testing /proc5/pib/chiplet at f000000/phb0 4
+Testing /proc5/pib/chiplet at f000000/phb1 5
+Testing /proc6/pib/chiplet at d000000/phb0 0
+Testing /proc6/pib/chiplet at d000000/phb1 1
+Testing /proc6/pib/chiplet at e000000/phb0 2
+Testing /proc6/pib/chiplet at e000000/phb1 3
+Testing /proc6/pib/chiplet at f000000/phb0 4
+Testing /proc6/pib/chiplet at f000000/phb1 5
+Testing /proc7/pib/chiplet at d000000/phb0 0
+Testing /proc7/pib/chiplet at d000000/phb1 1
+Testing /proc7/pib/chiplet at e000000/phb0 2
+Testing /proc7/pib/chiplet at e000000/phb1 3
+Testing /proc7/pib/chiplet at f000000/phb0 4
+Testing /proc7/pib/chiplet at f000000/phb1 5
EOF
test_run libpdbg_p9_fapi_translation_test phb
@@ -208,6 +532,30 @@ Testing /proc1/pib/chiplet at 3000000/n1/mcs2 2
Testing /proc1/pib/chiplet at 3000000/n1/mcs3 3
Testing /proc1/pib/chiplet at 5000000/n3/mcs0 0
Testing /proc1/pib/chiplet at 5000000/n3/mcs1 1
+Testing /proc2/pib/chiplet at 3000000/n1/mcs2 2
+Testing /proc2/pib/chiplet at 3000000/n1/mcs3 3
+Testing /proc2/pib/chiplet at 5000000/n3/mcs0 0
+Testing /proc2/pib/chiplet at 5000000/n3/mcs1 1
+Testing /proc3/pib/chiplet at 3000000/n1/mcs2 2
+Testing /proc3/pib/chiplet at 3000000/n1/mcs3 3
+Testing /proc3/pib/chiplet at 5000000/n3/mcs0 0
+Testing /proc3/pib/chiplet at 5000000/n3/mcs1 1
+Testing /proc4/pib/chiplet at 3000000/n1/mcs2 2
+Testing /proc4/pib/chiplet at 3000000/n1/mcs3 3
+Testing /proc4/pib/chiplet at 5000000/n3/mcs0 0
+Testing /proc4/pib/chiplet at 5000000/n3/mcs1 1
+Testing /proc5/pib/chiplet at 3000000/n1/mcs2 2
+Testing /proc5/pib/chiplet at 3000000/n1/mcs3 3
+Testing /proc5/pib/chiplet at 5000000/n3/mcs0 0
+Testing /proc5/pib/chiplet at 5000000/n3/mcs1 1
+Testing /proc6/pib/chiplet at 3000000/n1/mcs2 2
+Testing /proc6/pib/chiplet at 3000000/n1/mcs3 3
+Testing /proc6/pib/chiplet at 5000000/n3/mcs0 0
+Testing /proc6/pib/chiplet at 5000000/n3/mcs1 1
+Testing /proc7/pib/chiplet at 3000000/n1/mcs2 2
+Testing /proc7/pib/chiplet at 3000000/n1/mcs3 3
+Testing /proc7/pib/chiplet at 5000000/n3/mcs0 0
+Testing /proc7/pib/chiplet at 5000000/n3/mcs1 1
EOF
test_run libpdbg_p9_fapi_translation_test mcs
@@ -230,6 +578,54 @@ Testing /proc1/pib/chiplet at 8000000/mc at 1/mca0 4
Testing /proc1/pib/chiplet at 8000000/mc at 1/mca1 5
Testing /proc1/pib/chiplet at 8000000/mc at 1/mca2 6
Testing /proc1/pib/chiplet at 8000000/mc at 1/mca3 7
+Testing /proc2/pib/chiplet at 7000000/mc at 0/mca0 0
+Testing /proc2/pib/chiplet at 7000000/mc at 0/mca1 1
+Testing /proc2/pib/chiplet at 7000000/mc at 0/mca2 2
+Testing /proc2/pib/chiplet at 7000000/mc at 0/mca3 3
+Testing /proc2/pib/chiplet at 8000000/mc at 1/mca0 4
+Testing /proc2/pib/chiplet at 8000000/mc at 1/mca1 5
+Testing /proc2/pib/chiplet at 8000000/mc at 1/mca2 6
+Testing /proc2/pib/chiplet at 8000000/mc at 1/mca3 7
+Testing /proc3/pib/chiplet at 7000000/mc at 0/mca0 0
+Testing /proc3/pib/chiplet at 7000000/mc at 0/mca1 1
+Testing /proc3/pib/chiplet at 7000000/mc at 0/mca2 2
+Testing /proc3/pib/chiplet at 7000000/mc at 0/mca3 3
+Testing /proc3/pib/chiplet at 8000000/mc at 1/mca0 4
+Testing /proc3/pib/chiplet at 8000000/mc at 1/mca1 5
+Testing /proc3/pib/chiplet at 8000000/mc at 1/mca2 6
+Testing /proc3/pib/chiplet at 8000000/mc at 1/mca3 7
+Testing /proc4/pib/chiplet at 7000000/mc at 0/mca0 0
+Testing /proc4/pib/chiplet at 7000000/mc at 0/mca1 1
+Testing /proc4/pib/chiplet at 7000000/mc at 0/mca2 2
+Testing /proc4/pib/chiplet at 7000000/mc at 0/mca3 3
+Testing /proc4/pib/chiplet at 8000000/mc at 1/mca0 4
+Testing /proc4/pib/chiplet at 8000000/mc at 1/mca1 5
+Testing /proc4/pib/chiplet at 8000000/mc at 1/mca2 6
+Testing /proc4/pib/chiplet at 8000000/mc at 1/mca3 7
+Testing /proc5/pib/chiplet at 7000000/mc at 0/mca0 0
+Testing /proc5/pib/chiplet at 7000000/mc at 0/mca1 1
+Testing /proc5/pib/chiplet at 7000000/mc at 0/mca2 2
+Testing /proc5/pib/chiplet at 7000000/mc at 0/mca3 3
+Testing /proc5/pib/chiplet at 8000000/mc at 1/mca0 4
+Testing /proc5/pib/chiplet at 8000000/mc at 1/mca1 5
+Testing /proc5/pib/chiplet at 8000000/mc at 1/mca2 6
+Testing /proc5/pib/chiplet at 8000000/mc at 1/mca3 7
+Testing /proc6/pib/chiplet at 7000000/mc at 0/mca0 0
+Testing /proc6/pib/chiplet at 7000000/mc at 0/mca1 1
+Testing /proc6/pib/chiplet at 7000000/mc at 0/mca2 2
+Testing /proc6/pib/chiplet at 7000000/mc at 0/mca3 3
+Testing /proc6/pib/chiplet at 8000000/mc at 1/mca0 4
+Testing /proc6/pib/chiplet at 8000000/mc at 1/mca1 5
+Testing /proc6/pib/chiplet at 8000000/mc at 1/mca2 6
+Testing /proc6/pib/chiplet at 8000000/mc at 1/mca3 7
+Testing /proc7/pib/chiplet at 7000000/mc at 0/mca0 0
+Testing /proc7/pib/chiplet at 7000000/mc at 0/mca1 1
+Testing /proc7/pib/chiplet at 7000000/mc at 0/mca2 2
+Testing /proc7/pib/chiplet at 7000000/mc at 0/mca3 3
+Testing /proc7/pib/chiplet at 8000000/mc at 1/mca0 4
+Testing /proc7/pib/chiplet at 8000000/mc at 1/mca1 5
+Testing /proc7/pib/chiplet at 8000000/mc at 1/mca2 6
+Testing /proc7/pib/chiplet at 8000000/mc at 1/mca3 7
EOF
test_run libpdbg_p9_fapi_translation_test mca
@@ -240,6 +636,18 @@ Testing /proc0/pib/chiplet at 7000000/mc at 0/mcbist 0
Testing /proc0/pib/chiplet at 8000000/mc at 1/mcbist 1
Testing /proc1/pib/chiplet at 7000000/mc at 0/mcbist 0
Testing /proc1/pib/chiplet at 8000000/mc at 1/mcbist 1
+Testing /proc2/pib/chiplet at 7000000/mc at 0/mcbist 0
+Testing /proc2/pib/chiplet at 8000000/mc at 1/mcbist 1
+Testing /proc3/pib/chiplet at 7000000/mc at 0/mcbist 0
+Testing /proc3/pib/chiplet at 8000000/mc at 1/mcbist 1
+Testing /proc4/pib/chiplet at 7000000/mc at 0/mcbist 0
+Testing /proc4/pib/chiplet at 8000000/mc at 1/mcbist 1
+Testing /proc5/pib/chiplet at 7000000/mc at 0/mcbist 0
+Testing /proc5/pib/chiplet at 8000000/mc at 1/mcbist 1
+Testing /proc6/pib/chiplet at 7000000/mc at 0/mcbist 0
+Testing /proc6/pib/chiplet at 8000000/mc at 1/mcbist 1
+Testing /proc7/pib/chiplet at 7000000/mc at 0/mcbist 0
+Testing /proc7/pib/chiplet at 8000000/mc at 1/mcbist 1
EOF
test_run libpdbg_p9_fapi_translation_test mcbist
@@ -332,6 +740,264 @@ Testing /proc1/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 34000000 52
Testing /proc1/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 35000000 53
Testing /proc1/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 36000000 54
Testing /proc1/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 37000000 55
+Testing /proc2/pib/chiplet at 1000000 1
+Testing /proc2/pib/chiplet at 2000000 2
+Testing /proc2/pib/chiplet at 3000000 3
+Testing /proc2/pib/chiplet at 4000000 4
+Testing /proc2/pib/chiplet at 5000000 5
+Testing /proc2/pib/chiplet at 6000000 6
+Testing /proc2/pib/chiplet at 7000000 7
+Testing /proc2/pib/chiplet at 8000000 8
+Testing /proc2/pib/chiplet at 9000000 9
+Testing /proc2/pib/chiplet at c000000 12
+Testing /proc2/pib/chiplet at d000000 13
+Testing /proc2/pib/chiplet at e000000 14
+Testing /proc2/pib/chiplet at f000000 15
+Testing /proc2/pib/chiplet at 10000000 16
+Testing /proc2/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 20000000 32
+Testing /proc2/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 21000000 33
+Testing /proc2/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 22000000 34
+Testing /proc2/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 23000000 35
+Testing /proc2/pib/chiplet at 11000000 17
+Testing /proc2/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 24000000 36
+Testing /proc2/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 25000000 37
+Testing /proc2/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 26000000 38
+Testing /proc2/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 27000000 39
+Testing /proc2/pib/chiplet at 12000000 18
+Testing /proc2/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 28000000 40
+Testing /proc2/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 29000000 41
+Testing /proc2/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2a000000 42
+Testing /proc2/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2b000000 43
+Testing /proc2/pib/chiplet at 13000000 19
+Testing /proc2/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2c000000 44
+Testing /proc2/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2d000000 45
+Testing /proc2/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2e000000 46
+Testing /proc2/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2f000000 47
+Testing /proc2/pib/chiplet at 14000000 20
+Testing /proc2/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 30000000 48
+Testing /proc2/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 31000000 49
+Testing /proc2/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 32000000 50
+Testing /proc2/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 33000000 51
+Testing /proc2/pib/chiplet at 15000000 21
+Testing /proc2/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 34000000 52
+Testing /proc2/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 35000000 53
+Testing /proc2/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 36000000 54
+Testing /proc2/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 37000000 55
+Testing /proc3/pib/chiplet at 1000000 1
+Testing /proc3/pib/chiplet at 2000000 2
+Testing /proc3/pib/chiplet at 3000000 3
+Testing /proc3/pib/chiplet at 4000000 4
+Testing /proc3/pib/chiplet at 5000000 5
+Testing /proc3/pib/chiplet at 6000000 6
+Testing /proc3/pib/chiplet at 7000000 7
+Testing /proc3/pib/chiplet at 8000000 8
+Testing /proc3/pib/chiplet at 9000000 9
+Testing /proc3/pib/chiplet at c000000 12
+Testing /proc3/pib/chiplet at d000000 13
+Testing /proc3/pib/chiplet at e000000 14
+Testing /proc3/pib/chiplet at f000000 15
+Testing /proc3/pib/chiplet at 10000000 16
+Testing /proc3/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 20000000 32
+Testing /proc3/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 21000000 33
+Testing /proc3/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 22000000 34
+Testing /proc3/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 23000000 35
+Testing /proc3/pib/chiplet at 11000000 17
+Testing /proc3/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 24000000 36
+Testing /proc3/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 25000000 37
+Testing /proc3/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 26000000 38
+Testing /proc3/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 27000000 39
+Testing /proc3/pib/chiplet at 12000000 18
+Testing /proc3/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 28000000 40
+Testing /proc3/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 29000000 41
+Testing /proc3/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2a000000 42
+Testing /proc3/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2b000000 43
+Testing /proc3/pib/chiplet at 13000000 19
+Testing /proc3/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2c000000 44
+Testing /proc3/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2d000000 45
+Testing /proc3/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2e000000 46
+Testing /proc3/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2f000000 47
+Testing /proc3/pib/chiplet at 14000000 20
+Testing /proc3/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 30000000 48
+Testing /proc3/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 31000000 49
+Testing /proc3/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 32000000 50
+Testing /proc3/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 33000000 51
+Testing /proc3/pib/chiplet at 15000000 21
+Testing /proc3/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 34000000 52
+Testing /proc3/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 35000000 53
+Testing /proc3/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 36000000 54
+Testing /proc3/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 37000000 55
+Testing /proc4/pib/chiplet at 1000000 1
+Testing /proc4/pib/chiplet at 2000000 2
+Testing /proc4/pib/chiplet at 3000000 3
+Testing /proc4/pib/chiplet at 4000000 4
+Testing /proc4/pib/chiplet at 5000000 5
+Testing /proc4/pib/chiplet at 6000000 6
+Testing /proc4/pib/chiplet at 7000000 7
+Testing /proc4/pib/chiplet at 8000000 8
+Testing /proc4/pib/chiplet at 9000000 9
+Testing /proc4/pib/chiplet at c000000 12
+Testing /proc4/pib/chiplet at d000000 13
+Testing /proc4/pib/chiplet at e000000 14
+Testing /proc4/pib/chiplet at f000000 15
+Testing /proc4/pib/chiplet at 10000000 16
+Testing /proc4/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 20000000 32
+Testing /proc4/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 21000000 33
+Testing /proc4/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 22000000 34
+Testing /proc4/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 23000000 35
+Testing /proc4/pib/chiplet at 11000000 17
+Testing /proc4/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 24000000 36
+Testing /proc4/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 25000000 37
+Testing /proc4/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 26000000 38
+Testing /proc4/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 27000000 39
+Testing /proc4/pib/chiplet at 12000000 18
+Testing /proc4/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 28000000 40
+Testing /proc4/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 29000000 41
+Testing /proc4/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2a000000 42
+Testing /proc4/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2b000000 43
+Testing /proc4/pib/chiplet at 13000000 19
+Testing /proc4/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2c000000 44
+Testing /proc4/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2d000000 45
+Testing /proc4/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2e000000 46
+Testing /proc4/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2f000000 47
+Testing /proc4/pib/chiplet at 14000000 20
+Testing /proc4/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 30000000 48
+Testing /proc4/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 31000000 49
+Testing /proc4/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 32000000 50
+Testing /proc4/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 33000000 51
+Testing /proc4/pib/chiplet at 15000000 21
+Testing /proc4/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 34000000 52
+Testing /proc4/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 35000000 53
+Testing /proc4/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 36000000 54
+Testing /proc4/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 37000000 55
+Testing /proc5/pib/chiplet at 1000000 1
+Testing /proc5/pib/chiplet at 2000000 2
+Testing /proc5/pib/chiplet at 3000000 3
+Testing /proc5/pib/chiplet at 4000000 4
+Testing /proc5/pib/chiplet at 5000000 5
+Testing /proc5/pib/chiplet at 6000000 6
+Testing /proc5/pib/chiplet at 7000000 7
+Testing /proc5/pib/chiplet at 8000000 8
+Testing /proc5/pib/chiplet at 9000000 9
+Testing /proc5/pib/chiplet at c000000 12
+Testing /proc5/pib/chiplet at d000000 13
+Testing /proc5/pib/chiplet at e000000 14
+Testing /proc5/pib/chiplet at f000000 15
+Testing /proc5/pib/chiplet at 10000000 16
+Testing /proc5/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 20000000 32
+Testing /proc5/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 21000000 33
+Testing /proc5/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 22000000 34
+Testing /proc5/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 23000000 35
+Testing /proc5/pib/chiplet at 11000000 17
+Testing /proc5/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 24000000 36
+Testing /proc5/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 25000000 37
+Testing /proc5/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 26000000 38
+Testing /proc5/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 27000000 39
+Testing /proc5/pib/chiplet at 12000000 18
+Testing /proc5/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 28000000 40
+Testing /proc5/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 29000000 41
+Testing /proc5/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2a000000 42
+Testing /proc5/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2b000000 43
+Testing /proc5/pib/chiplet at 13000000 19
+Testing /proc5/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2c000000 44
+Testing /proc5/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2d000000 45
+Testing /proc5/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2e000000 46
+Testing /proc5/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2f000000 47
+Testing /proc5/pib/chiplet at 14000000 20
+Testing /proc5/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 30000000 48
+Testing /proc5/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 31000000 49
+Testing /proc5/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 32000000 50
+Testing /proc5/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 33000000 51
+Testing /proc5/pib/chiplet at 15000000 21
+Testing /proc5/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 34000000 52
+Testing /proc5/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 35000000 53
+Testing /proc5/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 36000000 54
+Testing /proc5/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 37000000 55
+Testing /proc6/pib/chiplet at 1000000 1
+Testing /proc6/pib/chiplet at 2000000 2
+Testing /proc6/pib/chiplet at 3000000 3
+Testing /proc6/pib/chiplet at 4000000 4
+Testing /proc6/pib/chiplet at 5000000 5
+Testing /proc6/pib/chiplet at 6000000 6
+Testing /proc6/pib/chiplet at 7000000 7
+Testing /proc6/pib/chiplet at 8000000 8
+Testing /proc6/pib/chiplet at 9000000 9
+Testing /proc6/pib/chiplet at c000000 12
+Testing /proc6/pib/chiplet at d000000 13
+Testing /proc6/pib/chiplet at e000000 14
+Testing /proc6/pib/chiplet at f000000 15
+Testing /proc6/pib/chiplet at 10000000 16
+Testing /proc6/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 20000000 32
+Testing /proc6/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 21000000 33
+Testing /proc6/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 22000000 34
+Testing /proc6/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 23000000 35
+Testing /proc6/pib/chiplet at 11000000 17
+Testing /proc6/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 24000000 36
+Testing /proc6/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 25000000 37
+Testing /proc6/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 26000000 38
+Testing /proc6/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 27000000 39
+Testing /proc6/pib/chiplet at 12000000 18
+Testing /proc6/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 28000000 40
+Testing /proc6/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 29000000 41
+Testing /proc6/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2a000000 42
+Testing /proc6/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2b000000 43
+Testing /proc6/pib/chiplet at 13000000 19
+Testing /proc6/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2c000000 44
+Testing /proc6/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2d000000 45
+Testing /proc6/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2e000000 46
+Testing /proc6/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2f000000 47
+Testing /proc6/pib/chiplet at 14000000 20
+Testing /proc6/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 30000000 48
+Testing /proc6/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 31000000 49
+Testing /proc6/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 32000000 50
+Testing /proc6/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 33000000 51
+Testing /proc6/pib/chiplet at 15000000 21
+Testing /proc6/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 34000000 52
+Testing /proc6/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 35000000 53
+Testing /proc6/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 36000000 54
+Testing /proc6/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 37000000 55
+Testing /proc7/pib/chiplet at 1000000 1
+Testing /proc7/pib/chiplet at 2000000 2
+Testing /proc7/pib/chiplet at 3000000 3
+Testing /proc7/pib/chiplet at 4000000 4
+Testing /proc7/pib/chiplet at 5000000 5
+Testing /proc7/pib/chiplet at 6000000 6
+Testing /proc7/pib/chiplet at 7000000 7
+Testing /proc7/pib/chiplet at 8000000 8
+Testing /proc7/pib/chiplet at 9000000 9
+Testing /proc7/pib/chiplet at c000000 12
+Testing /proc7/pib/chiplet at d000000 13
+Testing /proc7/pib/chiplet at e000000 14
+Testing /proc7/pib/chiplet at f000000 15
+Testing /proc7/pib/chiplet at 10000000 16
+Testing /proc7/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 20000000 32
+Testing /proc7/pib/chiplet at 10000000/eq at 0/ex at 0/chiplet at 21000000 33
+Testing /proc7/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 22000000 34
+Testing /proc7/pib/chiplet at 10000000/eq at 0/ex at 1/chiplet at 23000000 35
+Testing /proc7/pib/chiplet at 11000000 17
+Testing /proc7/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 24000000 36
+Testing /proc7/pib/chiplet at 11000000/eq at 1/ex at 0/chiplet at 25000000 37
+Testing /proc7/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 26000000 38
+Testing /proc7/pib/chiplet at 11000000/eq at 1/ex at 1/chiplet at 27000000 39
+Testing /proc7/pib/chiplet at 12000000 18
+Testing /proc7/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 28000000 40
+Testing /proc7/pib/chiplet at 12000000/eq at 2/ex at 0/chiplet at 29000000 41
+Testing /proc7/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2a000000 42
+Testing /proc7/pib/chiplet at 12000000/eq at 2/ex at 1/chiplet at 2b000000 43
+Testing /proc7/pib/chiplet at 13000000 19
+Testing /proc7/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2c000000 44
+Testing /proc7/pib/chiplet at 13000000/eq at 3/ex at 0/chiplet at 2d000000 45
+Testing /proc7/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2e000000 46
+Testing /proc7/pib/chiplet at 13000000/eq at 3/ex at 1/chiplet at 2f000000 47
+Testing /proc7/pib/chiplet at 14000000 20
+Testing /proc7/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 30000000 48
+Testing /proc7/pib/chiplet at 14000000/eq at 4/ex at 0/chiplet at 31000000 49
+Testing /proc7/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 32000000 50
+Testing /proc7/pib/chiplet at 14000000/eq at 4/ex at 1/chiplet at 33000000 51
+Testing /proc7/pib/chiplet at 15000000 21
+Testing /proc7/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 34000000 52
+Testing /proc7/pib/chiplet at 15000000/eq at 5/ex at 0/chiplet at 35000000 53
+Testing /proc7/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 36000000 54
+Testing /proc7/pib/chiplet at 15000000/eq at 5/ex at 1/chiplet at 37000000 55
EOF
test_run libpdbg_p9_fapi_translation_test chiplet
@@ -370,6 +1036,102 @@ Testing /proc1/pib/ppe12 46
Testing /proc1/pib/ppe13 50
Testing /proc1/pib/ppe14 52
Testing /proc1/pib/ppe15 56
+Testing /proc2/pib/ppe0 0
+Testing /proc2/pib/ppe1 10
+Testing /proc2/pib/ppe2 13
+Testing /proc2/pib/ppe3 20
+Testing /proc2/pib/ppe4 25
+Testing /proc2/pib/ppe5 30
+Testing /proc2/pib/ppe6 40
+Testing /proc2/pib/ppe7 41
+Testing /proc2/pib/ppe8 42
+Testing /proc2/pib/ppe9 43
+Testing /proc2/pib/ppe10 44
+Testing /proc2/pib/ppe11 45
+Testing /proc2/pib/ppe12 46
+Testing /proc2/pib/ppe13 50
+Testing /proc2/pib/ppe14 52
+Testing /proc2/pib/ppe15 56
+Testing /proc3/pib/ppe0 0
+Testing /proc3/pib/ppe1 10
+Testing /proc3/pib/ppe2 13
+Testing /proc3/pib/ppe3 20
+Testing /proc3/pib/ppe4 25
+Testing /proc3/pib/ppe5 30
+Testing /proc3/pib/ppe6 40
+Testing /proc3/pib/ppe7 41
+Testing /proc3/pib/ppe8 42
+Testing /proc3/pib/ppe9 43
+Testing /proc3/pib/ppe10 44
+Testing /proc3/pib/ppe11 45
+Testing /proc3/pib/ppe12 46
+Testing /proc3/pib/ppe13 50
+Testing /proc3/pib/ppe14 52
+Testing /proc3/pib/ppe15 56
+Testing /proc4/pib/ppe0 0
+Testing /proc4/pib/ppe1 10
+Testing /proc4/pib/ppe2 13
+Testing /proc4/pib/ppe3 20
+Testing /proc4/pib/ppe4 25
+Testing /proc4/pib/ppe5 30
+Testing /proc4/pib/ppe6 40
+Testing /proc4/pib/ppe7 41
+Testing /proc4/pib/ppe8 42
+Testing /proc4/pib/ppe9 43
+Testing /proc4/pib/ppe10 44
+Testing /proc4/pib/ppe11 45
+Testing /proc4/pib/ppe12 46
+Testing /proc4/pib/ppe13 50
+Testing /proc4/pib/ppe14 52
+Testing /proc4/pib/ppe15 56
+Testing /proc5/pib/ppe0 0
+Testing /proc5/pib/ppe1 10
+Testing /proc5/pib/ppe2 13
+Testing /proc5/pib/ppe3 20
+Testing /proc5/pib/ppe4 25
+Testing /proc5/pib/ppe5 30
+Testing /proc5/pib/ppe6 40
+Testing /proc5/pib/ppe7 41
+Testing /proc5/pib/ppe8 42
+Testing /proc5/pib/ppe9 43
+Testing /proc5/pib/ppe10 44
+Testing /proc5/pib/ppe11 45
+Testing /proc5/pib/ppe12 46
+Testing /proc5/pib/ppe13 50
+Testing /proc5/pib/ppe14 52
+Testing /proc5/pib/ppe15 56
+Testing /proc6/pib/ppe0 0
+Testing /proc6/pib/ppe1 10
+Testing /proc6/pib/ppe2 13
+Testing /proc6/pib/ppe3 20
+Testing /proc6/pib/ppe4 25
+Testing /proc6/pib/ppe5 30
+Testing /proc6/pib/ppe6 40
+Testing /proc6/pib/ppe7 41
+Testing /proc6/pib/ppe8 42
+Testing /proc6/pib/ppe9 43
+Testing /proc6/pib/ppe10 44
+Testing /proc6/pib/ppe11 45
+Testing /proc6/pib/ppe12 46
+Testing /proc6/pib/ppe13 50
+Testing /proc6/pib/ppe14 52
+Testing /proc6/pib/ppe15 56
+Testing /proc7/pib/ppe0 0
+Testing /proc7/pib/ppe1 10
+Testing /proc7/pib/ppe2 13
+Testing /proc7/pib/ppe3 20
+Testing /proc7/pib/ppe4 25
+Testing /proc7/pib/ppe5 30
+Testing /proc7/pib/ppe6 40
+Testing /proc7/pib/ppe7 41
+Testing /proc7/pib/ppe8 42
+Testing /proc7/pib/ppe9 43
+Testing /proc7/pib/ppe10 44
+Testing /proc7/pib/ppe11 45
+Testing /proc7/pib/ppe12 46
+Testing /proc7/pib/ppe13 50
+Testing /proc7/pib/ppe14 52
+Testing /proc7/pib/ppe15 56
EOF
test_run libpdbg_p9_fapi_translation_test ppe
@@ -394,6 +1156,18 @@ Testing /proc0/pib/chiplet at 7000000/mc at 0 0
Testing /proc0/pib/chiplet at 8000000/mc at 1 1
Testing /proc1/pib/chiplet at 7000000/mc at 0 0
Testing /proc1/pib/chiplet at 8000000/mc at 1 1
+Testing /proc2/pib/chiplet at 7000000/mc at 0 0
+Testing /proc2/pib/chiplet at 8000000/mc at 1 1
+Testing /proc3/pib/chiplet at 7000000/mc at 0 0
+Testing /proc3/pib/chiplet at 8000000/mc at 1 1
+Testing /proc4/pib/chiplet at 7000000/mc at 0 0
+Testing /proc4/pib/chiplet at 8000000/mc at 1 1
+Testing /proc5/pib/chiplet at 7000000/mc at 0 0
+Testing /proc5/pib/chiplet at 8000000/mc at 1 1
+Testing /proc6/pib/chiplet at 7000000/mc at 0 0
+Testing /proc6/pib/chiplet at 8000000/mc at 1 1
+Testing /proc7/pib/chiplet at 7000000/mc at 0 0
+Testing /proc7/pib/chiplet at 8000000/mc at 1 1
EOF
test_run libpdbg_p9_fapi_translation_test mc
--
2.25.4
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