[Pdbg] [PATCH v2 2/3] p9-pib.dtsi.m4: Add additional pervasive chiplets

[Balbir Singh]

With meaningful names and compatible properties, indices
as seen on the pervasive bus

Signed-off-by: Balbir Singh <bsingharora at gmail.com>
---
 p9-pib.dts.m4 | 133 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 133 insertions(+)

diff --git a/p9-pib.dts.m4 b/p9-pib.dts.m4
index 1c8136e..799bbf4 100644
--- a/p9-pib.dts.m4
+++ b/p9-pib.dts.m4
@@ -53,6 +53,139 @@ htm at 50128C0 {
 	index = <0x1>;
 };
 
+global_fir {
+
+	reg = <0x0 0x570f001c 0x0>;
+	compatible = "ibm,xstop-scom";
+};
+
+
+tp {
+	index=<0x1>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+n0 {
+	index=<0x2>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+n1 {
+	index=<0x3>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+n2 {
+	index=<0x4>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+n3 {
+	index=<0x5>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+xb {
+	index=<0x6>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+mc1 {
+	index=<0x7>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+mc2 {
+	index=<0x8>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+ob1 {
+	index=<0x9>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+ob2 {
+	index=<0xa>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+ob3 {
+	index=<0xb>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+ob4 {
+	index=<0xc>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+phb1 {
+	index=<0xd>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+phb2 {
+	index=<0xe>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+phb3 {
+	index=<0xf>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+eq1 {
+	index=<0x10>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+eq2 {
+	index=<0x11>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+eq3 {
+	index=<0x12>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+eq4 {
+	index=<0x13>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+eq5 {
+	index=<0x14>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
+eq6 {
+	index=<0x15>;
+	compatible="ibm,power9-chiplet";
+	reg = <0x0 0x0 0xfffff>;
+};
+
 CORE(0, 32);
 CORE(1, 33);
 CORE(2, 34);
-- 
2.13.6