[Pdbg] [PATCH v3 04/13] libpdbg/p9chip.c: do not fence interrupts when stopping threads

Nicholas Piggin npiggin at gmail.com
Wed May 2 16:27:59 AEST 2018


POWER9 does not require interrupt fencing for sreset or ram (only
step). Ram mode implicitly fences interrupts, sreset does not
require them fenced.

Signed-off-by: Nicholas Piggin <npiggin at gmail.com>
---
 libpdbg/p9chip.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/libpdbg/p9chip.c b/libpdbg/p9chip.c
index 51d6db5..205b4cd 100644
--- a/libpdbg/p9chip.c
+++ b/libpdbg/p9chip.c
@@ -107,7 +107,6 @@ static int p9_thread_probe(struct pdbg_target *target)
 static int p9_thread_start(struct thread *thread)
 {
 	thread_write(thread, P9_DIRECT_CONTROL, PPC_BIT(6 + 8*thread->id));
-	thread_write(thread, P9_RAS_MODEREG, 0);
 
 	return 0;
 }
@@ -125,10 +124,6 @@ static int p9_thread_stop(struct thread *thread)
 		}
 	}
 
-	/* Fence interrupts. We can't do a read-modify-write here due to an
-	 * errata */
-	thread_write(thread, P9_RAS_MODEREG, PPC_BIT(57));
-
 	return 0;
 }
 
-- 
2.17.0



More information about the Pdbg mailing list