[Pdbg] [PATCH] p9-pib.dts: Add definitions for all chiplets

Balbir Singh bsingharora at gmail.com
Tue May 1 14:04:26 AEST 2018


On Mon, 30 Apr 2018 17:29:05 +1000
Alistair Popple <alistair at popple.id.au> wrote:

> Signed-off-by: Alistair Popple <alistair at popple.id.au>
> ---
>  p9-pib.dts.m4 | 50 +++++++++++++++++++++++++++++++++++++++++---------
>  1 file changed, 41 insertions(+), 9 deletions(-)
> 
> diff --git a/p9-pib.dts.m4 b/p9-pib.dts.m4
> index 341241a..e0248d1 100644
> --- a/p9-pib.dts.m4
> +++ b/p9-pib.dts.m4
> @@ -1,17 +1,23 @@
>  define(`CONCAT', `$1$2')dnl
>  define(`HEX', `CONCAT(0x, $1)')dnl
>  define(`CORE_BASE', `eval(0x20000000 + $1 * 0x1000000, 16)')dnl
> -define(`CORE', `core at CORE_BASE($1) {
> -#address-cells = <0x1>;
> -#size-cells = <0x0>;
> -compatible = "ibm,power9-core";
> -reg = <0x0 HEX(CORE_BASE($1)) 0xfffff>;
> +define(`CORE', `chiplet at CORE_BASE($1) {
> +compatible = "ibm,power9-chiplet";
>  index = <HEX(eval($2, 16))>;
> +reg = <0x0 HEX(CORE_BASE($1)) 0xfffff>;
>  
> -THREAD(0);
> -THREAD(1);
> -THREAD(2);
> -THREAD(3);
> +core at 0 {
> +       #address-cells = <0x1>;
> +       #size-cells = <0x0>;
> +       compatible = "ibm,power9-core";
> +       index = <HEX(eval($2, 16))>;
> +       reg = <0x0 0x0 0xfffff>;
> +
> +       THREAD(0);
> +       THREAD(1);
> +       THREAD(2);
> +       THREAD(3);
> +};
>  }')dnl
>  define(`THREAD_BASE', `eval($1, 16)')dnl
>  define(`THREAD',`thread at THREAD_BASE($1) {
> @@ -20,6 +26,12 @@ reg = <0x0>;
>  tid = <HEX(eval($1, 16))>;
>  index = <HEX(eval($1, 16))>;
>  }')dnl
> +define(`CHIPLET_BASE', `eval(0x1000000 * $1, 16)')dnl
> +define(`CHIPLET', `chiplet at CHIPLET_BASE($1) {
> +compatible = "ibm,power9-chiplet";
> +index = <HEX(eval($1, 16))>;
> +reg = <0x0 HEX(CHIPLET_BASE($1)) 0xfffff>;

Do we really need the len to be 0xfffff? I guess these are good defaults
for you to provide?

Acked-by: Balbir Singh <bsingharora at gmail.com>

Balbir Singh.


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