[Pdbg] [PATCH] libpdbg/p9chip: use SPWKUP_FSP instead of SPWKUP_OTR

Nicholas Piggin npiggin at gmail.com
Mon Jul 30 16:30:47 AEST 2018


On Mon, 30 Jul 2018 10:39:50 +0530
Mahesh Jagannath Salgaonkar <mahesh at linux.vnet.ibm.com> wrote:

> On 07/26/2018 04:09 PM, Nicholas Piggin wrote:
> > Dean Sanner notes that pdbg should not use the OTR special wakeup
> > register, as it is used by the PM complex (i.e., SGPE, CME, PGPE).
> > It should use the FSP register instead, which is reserved for service
> > processor firmware, and nothing else in OpenBMC uses this at the
> > moment.
> > 
> > In theory when pdbg is used via the host, it should be using the HYP
> > register via some OPAL arbitration mechanism (OPAL being the owner of
> > the HYP register), but in the absence of any of that mechanism, FSP
> > is the best option.
> > 
> > Signed-off-by: Nicholas Piggin <npiggin at gmail.com>
> > ---
> >  libpdbg/p9chip.c | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> > 
> > diff --git a/libpdbg/p9chip.c b/libpdbg/p9chip.c
> > index c5de3bb..3a7ff8a 100644
> > --- a/libpdbg/p9chip.c
> > +++ b/libpdbg/p9chip.c
> > @@ -71,7 +71,7 @@
> >  #define  NET_CTRL0_FENCE_EN 		PPC_BIT(18)
> >  #define NET_CTRL0_WOR	0xf0042
> >  #define PPM_GPMMR	0xf0100
> > -#define PPM_SPWKUP_OTR	0xf010a
> > +#define PPM_SPWKUP_FSP	0xf010b  
> 
> >  #define PPM_SSHOTR	0xf0113  
> 
> Now that we are using FSP register to assert special wakeup, shouldn't
> we also change above to 0xf0111 (STOP_STATE_HIST_FSP_REG) for special
> wakeup DONE bit check ?

Oh you're right, hmm I must have messed up my testing. I'll resubmit.

Thanks,
Nick


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