[OpenPower-Firmware] Questions about SCOM access

[Igor Bagnucki]

Thank you for your advice,

I have followed your suggestion about using base address 0x000603FC00000000.
I have also done few other tests and tried to set MSB, to avoid HRMOR 
translation.
It was also discovered during the research, that the register address 
must be shifted left by 3.
The results of the research are gathered in this document: 
https://github.com/3mdeb/openpower-coreboot-docs/blob/scom_access/devnotes/scom_access.md

The puzzling thing is that I managed to read SCOM on QEMU, but it's 
still failing on real HW.

I'm not sure if it was clear from previous message, but I'm working 
without any previous initialization from hostboot.
Just pure coreboot, started directly by HBBL.

Do you have any idea, what can be causing HW to fail while reading SCOM?

--
Igor Bagnucki
Junior Embedded Firmware Developer
https://3mdeb.com | @3mdeb_com

On 10.12.2020 22:31, Christian Geddes wrote:
> Hey Igor,
> So as you have probably figure out by now, SCOM registers are 64 bit 
> HW regs
> IBM puts in all of its its chips. I am not an expert on the subject 
> but I will
> share how some things work as I understand it.
>
> Hostboot configures the hardware using plenty of SCOM registers. How can
> I access these registers?
> For example, if I would like to access register PU_OCB_OCI_OCCHBR_SCOM
> which has the SCOM address of 0x6C08F, how would I access this register?
> There are a few different methods to access SCOM registers depending 
> on what
> device its on and what point of the boot you are in.
> The easiest way to access a scom register is from the primary 
> processor over
> something we call xscom. XSCOM essentially boils down to accessing an MMIO
> address offset by the xscom bar passed to us by the SBE via some struct.
> The default value for group0's XSCOM base addr is 0x000603FC00000000 which
> is a pretty safe bet if you are having a hard time finding the bootloader
> structure. Now this base address can change if the SBE sets it to 
> something
> else, or we end up in some memory swapping scenario, and its going to be
> different when talking to secondary processors.
> Hostboot takes that XSCOM_BAR and gets a virtual address for it and 
> adds it to
> (scom address / sizeof(int64)) to get the address we do the memcpy on.
> See xscomDoOp, getTargetVirtualAddress in src/usr/xscom/xscom.C for 
> more info.
>
> Knowing the initial values of the SCOM registers would be very helpful.
> Are there any documents describing in what state are the registers on
> power-on?
> The hardware writes most of these registers to 0 at power on (aside 
> from a few
> inverts), then the SBE comes along and SCANs in a bunch of inital 
> settings.
> SCAN is another HW access method for the same data in a different 
> address space
> which is used for writing large amounts of HW settings very quickly. 
> During
> hostboot many of these registers are set by the FAPI2 hardware procedures
> you see in /hostboot/src/import/chips/p9/procedures/hwp/initfiles/. If you
> look at those init files you can see most of the registers are set 
> based on
> the chip EC level and MRW attributes. Hostboot also sets some 
> registers along
> the way.
>
> I understand that before accessing registers the SCOM controller has to
> be initialized. Is there some kind of documentation where information
> about this can be found?
> The SBE should setup the xscom bar for its processor. You will not be 
> able to
> access SCOMs to the secondary processor until the fabric is initialized
> between the processors.
>
> I hope some of this information helps.
>
> Regards,
> Christian Geddes
>
>     ----- Original message -----
>     From: Igor Bagnucki <igor.bagnucki at 3mdeb.com>
>     Sent by: "OpenPower-Firmware"
>     <openpower-firmware-bounces+crgeddes=us.ibm.com at lists.ozlabs.org>
>     To: openpower-firmware at lists.ozlabs.org
>     Cc: "piotr.krol at 3mdeb.com maciej.pijanowski at 3mdeb.com
>     krystian.hebel"@3mdeb.com
>     Subject: [EXTERNAL] [OpenPower-Firmware] Questions about SCOM access
>     Date: Thu, Dec 10, 2020 9:33 AM
>     Hello,
>
>     I'm doing some initial work at 3mdeb for Insurgo, to bring Power9
>     (specifically Talos II) support into coreboot and I have some
>     questions
>     about SCOM that I can't find an answer for. Reading through documents
>     POWER9_Registers_vol1/2/3, I have found only general information about
>     SCOM controller. I have also tried to find information in the hostboot
>     source code, but the code is quite complicated to understand.
>
>     Hostboot configures the hardware using plenty of SCOM registers.
>     How can
>     I access these registers?
>     For example, if I would like to access register PU_OCB_OCI_OCCHBR_SCOM
>     which has the SCOM address of 0x6C08F, how would I access this
>     register?
>
>     Knowing the initial values of the SCOM registers would be very
>     helpful.
>     Are there any documents describing in what state are the registers on
>     power-on?
>
>     I understand that before accessing registers the SCOM controller
>     has to
>     be initialized. Is there some kind of documentation where information
>     about this can be found?
>
>     --
>     Igor Bagnucki
>     Junior Embedded Firmware Developer
>     https://3mdeb.com  | @3mdeb_com
>
>     _______________________________________________
>     OpenPower-Firmware mailing list
>     OpenPower-Firmware at lists.ozlabs.org
>     https://lists.ozlabs.org/listinfo/openpower-firmware
>
>
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