[OpenPower-Firmware] [PATCH 2/2] powerpc/64s: Add workaround for P9 vector CI load issue
Joel Stanley
joel at jms.id.au
Wed Oct 4 14:50:19 AEDT 2017
On Wed, Oct 4, 2017 at 12:12 PM, Samuel Mendoza-Jonas
<sam at mendozajonas.com> wrote:
> From: Michael Neuling <mikey at neuling.org>
>
> POWER9 DD2.1 and earlier has an issue where some cache inhibited
> vector load will return bad data. The workaround is two part, one
> firmware/microcode part triggers HMI interrupts when hitting such
> loads, the other part is this patch which then emulates the
> instructions in Linux.
>
> The affected instructions are limited to lxvd2x, lxvw4x, lxvb16x and
> lxvh8x.
>
> When an instruction triggers the HMI, all threads in the core will be
> sent to the HMI handler, not just the one running the vector load.
>
> In general, these spurious HMIs are detected by the emulation code and
> we just return back to the running process. Unfortunately, if a
> spurious interrupt occurs on a vector load that's to normal memory we
> have no way to detect that it's spurious (unless we walk the page
> tables, which is very expensive). In this case we emulate the load but
> we need do so using a vector load itself to ensure 128bit atomicity is
> preserved.
>
> Some additional debugfs emulated instruction counters are added also.
>
> Signed-off-by: Michael Neuling <mikey at neuling.org>
> Signed-off-by: Benjamin Herrenschmidt <benh at kernel.crashing.org>
> [mpe: Switch CONFIG_PPC_BOOK3S_64 to CONFIG_VSX to unbreak the build]
> Signed-off-by: Michael Ellerman <mpe at ellerman.id.au>
> (cherry picked from commit 5080332c2c893118dbc18755f35c8b0131cf0fc4)
> Signed-off-by: Samuel Mendoza-Jonas <sam at mendozajonas.com>
Thanks. I've pulled these two into the tree and made as release as
v4.13.4-openpower2.
https://github.com/open-power/op-build/pull/1515
Cheers,
Joel
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