[PATCH net-next v9 2/3] arm64: dts: nuvoton: Add Ethernet nodes

[Joey Lu]

> On Mon, Jan 26, 2026 at 06:22:56PM +0800, Joey Lu wrote:
>> Add GMAC nodes for our MA35D1 development boards:
>> two RGMII interfaces for SOM board, and one RGMII
>> and one RMII interface for IoT board.
>>
>> Signed-off-by: Joey Lu<a0987203069 at gmail.com>
>> ---
>>   .../boot/dts/nuvoton/ma35d1-iot-512m.dts      | 33 +++++++++++++++++++
>>   .../boot/dts/nuvoton/ma35d1-som-256m.dts      | 32 ++++++++++++++++++
>>   arch/arm64/boot/dts/nuvoton/ma35d1.dtsi       | 32 ++++++++++++++++++
> Did you answer my question about what these represent?
>
> I _think_ your .dts{i} files are all messed up and need
> re-architecturing.
>
> arch/arm64/boot/dts/nuvoton/ma35d1.dtsi should represent the SoC.
>
> There should be a .dtsi file which represents everything on the SOM.
> This includes the SoC .dtsi file.
>
> There should be a .dts file for the carrier board. It should include
> the SOM .dtsi file.
>
> You said one of the boards does not use the SOM, so it can directly
> import the SoC .dtsi file.
>
>>   3 files changed, 97 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts
>> index 9482bec1aa57..ee32cedf3d9b 100644
>> --- a/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts
>> +++ b/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts
>> @@ -18,6 +18,8 @@ aliases {
>>   		serial12 = &uart12;
>>   		serial13 = &uart13;
>>   		serial14 = &uart14;
>> +		ethernet0 = &gmac0;
>> +		ethernet1 = &gmac1;
>>   	};
>>   
>>   	chosen {
>> @@ -126,3 +128,34 @@ &uart14 {
>>   	pinctrl-0 = <&pinctrl_uart14>;
>>   	status = "okay";
>>   };
>> +
>> +&gmac0 {
>> +	phy-handle = <&eth_phy0>;
> This is a .dts file, so represents a board. You said the PHYs are on
> the board, not the SOM. So this is correct.
>
>
>> +	status = "okay";
>> +
>> +	mdio0: mdio {
>> +		compatible = "snps,dwmac-mdio";
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
> The MDIO bus is a property of the SoC. It always exists, even if it is
> not used. So the mdio node should be in the SoC .dtsi file.
>
>> +		eth_phy0: ethernet-phy at 0 {
>> +			reg = <0>;
>> +		};
> The PHY is a property of the board, so should be in the board .dts
> file.
>
>> +	};
>> +};
>> +
>> +&gmac1 {
>> +	phy-mode = "rmii";
>> +	phy-handle = <&eth_phy1>;
>> +	status = "okay";
> Correct.
>
>> +
>> +	mdio1: mdio {
>> +		compatible = "snps,dwmac-mdio";
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
> Wrong.
>
>> +
>> +		eth_phy1: ethernet-phy at 1 {
>> +			reg = <1>;
>> +		};
> Correct.
>
>> +	};
>> +};
>> diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts
>> index f6f20a17e501..b1b3e45280d5 100644
>> --- a/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts
>> +++ b/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts
>> @@ -18,6 +18,8 @@ aliases {
>>   		serial12 = &uart12;
>>   		serial14 = &uart14;
>>   		serial16 = &uart16;
>> +		ethernet0 = &gmac0;
>> +		ethernet1 = &gmac1;
>>   	};
>>   
>>   	chosen {
>> @@ -129,3 +131,33 @@ &uart16 {
>>   	pinctrl-0 = <&pinctrl_uart16>;
>>   	status = "okay";
>>   };
>> +
>> +&gmac0 {
>> +	phy-handle = <&eth_phy0>;
>> +	status = "okay";
>> +
>> +	mdio0: mdio {
>> +		compatible = "snps,dwmac-mdio";
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		eth_phy0: ethernet-phy at 0 {
>> +			reg = <0>;
>> +		};
>> +	};
>> +};
>> +
>> +&gmac1 {
>> +	phy-handle = <&eth_phy1>;
>> +	status = "okay";
>> +
>> +	mdio1: mdio {
>> +		compatible = "snps,dwmac-mdio";
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		eth_phy1: ethernet-phy at 1 {
>> +			reg = <1>;
>> +		};
>> +	};
>> +};
> Same problem as above.
>
>> --- a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
>> +++ b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
> This represents the SoC.
>
>> @@ -379,5 +379,37 @@ uart16: serial at 40880000 {
>>   			clocks = <&clk UART16_GATE>;
>>   			status = "disabled";
>>   		};
>> +
>> +		gmac0: ethernet at 40120000 {
>> +			compatible = "nuvoton,ma35d1-dwmac";
>> +			reg = <0x0 0x40120000 0x0 0x10000>;
>> +			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
>> +			interrupt-names = "macirq";
>> +			clocks = <&clk EMAC0_GATE>, <&clk EPLL_DIV8>;
>> +			clock-names = "stmmaceth", "ptp_ref";
>> +
>> +			nuvoton,sys = <&sys 0>;
>> +			resets = <&sys MA35D1_RESET_GMAC0>;
>> +			reset-names = "stmmaceth";
>> +
>> +			phy-mode = "rgmii-id";
> PHY mode is a property of the board. The board might have extra long
> clock lines, so needs 'rgmii'. The board might use MII?
>
> Please think about the hierarchy.  SoC -> SoM -> board. Put the
> properties at the correct level.
>
>      Andrew
>
> ---
> pw-bot: cr

Thanks for the clear explanation. I understand now.

I’ll move the MDIO bus nodes to the SoC |.dtsi| and keep PHYs in the 
board |.dts| in the next revision.

Best regards,

Joey
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.ozlabs.org/pipermail/openbmc/attachments/20260127/0f43c2b8/attachment.htm>