[PATCH v2 2/2] ARM: dts: aspeed: Add NVIDIA VR144NVL board
Donald Shannon
donalds at nvidia.com
Wed Sep 10 09:05:15 AEST 2025
On 9/3/25 00:07, Andrew Jeffery wrote:
> Hi Donald,
>
> On Fri, 2025-08-22 at 13:38 -0700, Donald Shannon wrote:
>> This is an Aspeed AST2600 based BMC board for the NVIDIA VR144NVL
>> Platform.
>>
>> Reference to Ast2600 SOC [1].
>> Reference to DC-SCM Spec [2].
>>
>> Link: https://www.aspeedtech.com/server_ast2600/ [1]
>> Link: https://www.opencompute.org/w/index.php?title=Server/MHS/DC-SCM-Specs-and-Designs [2]
>>
>> Signed-off-by: Donald Shannon <donalds at nvidia.com>
>> ---
>> arch/arm/boot/dts/aspeed/Makefile | 1 +
>> .../dts/aspeed/aspeed-bmc-nvidia-vr144nvl.dts | 779 ++++++++++++++++++
>> 2 files changed, 780 insertions(+)
>> create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-vr144nvl.dts
>>
>> diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile
>> index 8062c685f7e8..b479824c434b 100644
>> --- a/arch/arm/boot/dts/aspeed/Makefile
>> +++ b/arch/arm/boot/dts/aspeed/Makefile
>> @@ -55,6 +55,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
>> aspeed-bmc-lenovo-hr855xg2.dtb \
>> aspeed-bmc-microsoft-olympus.dtb \
>> aspeed-bmc-nvidia-gb200nvl-bmc.dtb \
>> + aspeed-bmc-nvidia-vr144nvl.dtb \
>> aspeed-bmc-opp-lanyang.dtb \
>> aspeed-bmc-opp-mowgli.dtb \
>> aspeed-bmc-opp-nicole.dtb \
>> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-vr144nvl.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-vr144nvl.dts
>> new file mode 100644
>> index 000000000000..5984984b5109
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-vr144nvl.dts
>> @@ -0,0 +1,779 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/dts-v1/;
>> +
>> +#include "aspeed-g6.dtsi"
>> +#include <dt-bindings/gpio/aspeed-gpio.h>
>> +#include <dt-bindings/input/input.h>
>> +#include <dt-bindings/leds/common.h>
>> +
>> +/ {
>> + model = "AST2600 VR144NVL BMC";
>> + compatible = "nvidia,vr144nvl-bmc", "aspeed,ast2600";
>> +
>> + aliases {
>> + serial2 = &uart3;
>> + serial4 = &uart5;
>> + i2c16 = &c0uphy0;
>> + i2c17 = &c0uphy2;
>> + i2c24 = &c1uphy0;
>> + i2c25 = &c1uphy2;
>> + i2c32 = &i2c_usb_hub;
>> + i2c33 = &i2c_tpm;
>> + i2c34 = &i2c_dp;
>> + i2c35 = &i2c_rtc;
>> + };
>> +
>> + buttons {
>> + compatible = "gpio-keys";
>> + button-power {
>> + label = "power_btn";
>> + linux,code = <KEY_POWER>;
>> + gpios = <&exp7 9 GPIO_ACTIVE_LOW>;
>> + };
>> + button-uid {
>> + label = "uid_btn";
>> + linux,code = <KEY_FN_1>;
>> + gpios = <&exp7 11 GPIO_ACTIVE_LOW>;
>> + };
>> + };
>> +
>> + chosen {
>> + stdout-path = &uart5;
>> + };
>> +
>> + leds {
>> + compatible = "gpio-leds";
>> + hb-led {
>> + gpios = <&gpio0 127 GPIO_ACTIVE_LOW>;
>> + function = LED_FUNCTION_HEARTBEAT;
>> + color = <LED_COLOR_ID_GREEN>;
>> + label = "bmc-hbled";
>> + linux,default-trigger = "heartbeat";
>> + default-state = "on";
>> + retain-state-suspended;
>> + retain-state-shutdown;
>> + };
>> + pwr-led {
>> + gpios = <&exp7 8 GPIO_ACTIVE_LOW>;
>> + function = LED_FUNCTION_POWER;
>> + color = <LED_COLOR_ID_WHITE>;
>> + label = "pwr-led";
>> + linux,default-trigger = "default-on";
>> + default-state = "on";
>> + retain-state-suspended;
>> + retain-state-shutdown;
>> + };
>> + uid-led {
>> + gpios = <&exp7 10 GPIO_ACTIVE_LOW>;
>> + function = LED_FUNCTION_INDICATOR;
>> + color = <LED_COLOR_ID_BLUE>;
>> + label = "uid-led";
>> + default-state = "off";
>> + retain-state-suspended;
>> + retain-state-shutdown;
>> + };
>> + fault-led {
>> + gpios = <&exp7 12 GPIO_ACTIVE_LOW>;
>> + function = LED_FUNCTION_PANIC;
>> + color = <LED_COLOR_ID_WHITE>;
>> + label = "fault-led";
>> + default-state = "off";
>> + retain-state-suspended;
>> + retain-state-shutdown;
>> + panic-indicator;
>> + };
>> + warn-led {
>> + gpios = <&exp7 15 GPIO_ACTIVE_LOW>;
>> + function = LED_FUNCTION_PANIC;
>> + color = <LED_COLOR_ID_RED>;
>> + label = "warn-led";
>> + default-state = "off";
>> + retain-state-suspended;
>> + retain-state-shutdown;
>> + };
> To be consistent with my request on your other devicetree series, can
> you please order nodes that either have no unit address or reference a
> label alphabetically, in line with the DTS style guide?
>
>> + };
>> +
>> + memory at 80000000 {
>> + device_type = "memory";
>> + reg = <0x80000000 0x80000000>;
>> + };
>> +
>> + reg_3v3_stby: regulator-3v3-standby {
>> + compatible = "regulator-fixed";
>> + regulator-name = "3v3-standby";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + gpio = <&gpio0 ASPEED_GPIO(M, 3) GPIO_ACTIVE_HIGH>;
>> + enable-active-high;
>> + regulator-always-on;
>> + };
>> +
>> + reserved-memory {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + vga_memory: framebuffer at 9f000000 {
>> + no-map;
>> + reg = <0x9f000000 0x01000000>; /* 16M */
>> + };
>> +
>> + ramoops at a0000000 {
>> + compatible = "ramoops";
>> + reg = <0xa0000000 0x100000>; /* 1MB */
>> + record-size = <0x10000>; /* 64KB */
>> + max-reason = <2>; /* KMSG_DUMP_OOPS */
>> + };
>> +
>> + gfx_memory: framebuffer {
>> + compatible = "shared-dma-pool";
>> + reusable;
>> + size = <0x01000000>;
>> + alignment = <0x01000000>;
>> + };
>> +
>> + video_engine_memory: jpegbuffer {
>> + compatible = "shared-dma-pool";
>> + reusable;
>> + size = <0x02000000>; /* 32M */
>> + alignment = <0x01000000>;
>> + };
>> + };
>> +};
>> +
>> +// Enable Primary flash on FMC for bring up activity
>> +&fmc {
>> + status = "okay";
>> + flash at 0 {
>> + compatible = "jedec,spi-nor";
>> + label = "bmc";
>> + spi-max-frequency = <50000000>;
>> + status = "okay";
>> + partitions {
>> + compatible = "fixed-partitions";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + u-boot at 0 {
>> + // 896KB
>> + reg = <0x0 0xe0000>;
>> + label = "u-boot";
>> + };
>> +
>> + kernel at 100000 {
>> + // 9MB
>> + reg = <0x100000 0x900000>;
>> + label = "kernel";
>> + };
>> +
>> + rofs at a00000 {
>> + // 55292KB (extends to end of 64MB SPI - 4KB)
>> + reg = <0xa00000 0x35FF000>;
>> + label = "rofs";
>> + };
>> + };
> This isn't using one of the usual OpenBMC flash layouts? Can you add a
> comment as to why?
>
>> + };
>> +};
>> +
>> +&spi2 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_spi2_default>;
>> + status = "okay";
>> + // Data SPI is 64MB in size
>> + flash at 0 {
>> + compatible = "jedec,spi-nor";
>> + label = "config";
>> + spi-max-frequency = <50000000>;
>> + status = "okay";
>> + partitions {
>> + compatible = "fixed-partitions";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + u-boot-env at 0 {
>> + // 256KB
>> + reg = <0x0 0x40000>;
>> + label = "u-boot-env";
>> + };
>> +
>> + rwfs at 40000 {
>> + // 16MB
>> + reg = <0x40000 0x1000000>;
>> + label = "rwfs";
>> + };
>> +
>> + log at 1040000 {
>> + // 40MB
>> + reg = <0x1040000 0x2800000>;
>> + label = "log";
>> + };
>> + };
>> + };
>> +};
>> +
>> +&mdio0 {
>> + status = "okay";
>> + ethphy0: ethernet-phy at 0 {
>> + compatible = "ethernet-phy-ieee802.3-c22";
>> + reg = <0>;
>> + };
>> +};
>> +
>> +&mac0 {
>> + pinctrl-names = "default";
>> + phy-mode = "rgmii-id";
> Is this correct, in the context of the query here?
>
> https://lore.kernel.org/all/6a3d7eb4-c091-437f-98f8-2b8577e539a7@lunn.ch/
>
> If not, please drop the node from the patch until the MAC driver is
> fixed with respect to the RGMII delays.
>
> Andrew
Hi Andrew,
I will change this to alphabetical order.
The extra space in our flash is for root of trust application. I will note this in the next patch.
I see that the ftgmac100 drivers do not use the phy-mode parameter so I will leave it out.
Thanks,
Don
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