[PATCH u-boot, v2019.04-aspeed-openbmc v1] ARM: dts: Aspeed: Add Facebook Minerva DTS
Peter Yin
peteryin.openbmc at gmail.com
Thu Jun 6 00:00:19 AEST 2024
Initial introduction of Facebook Minerva
equipped with Aspeed 2600 BMC SoC.
Signed-off-by: Peter Yin <peteryin.openbmc at gmail.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/ast2600-minerva.dts | 66 ++++++++++++++++++++++++++++++++
2 files changed, 67 insertions(+)
create mode 100644 arch/arm/dts/ast2600-minerva.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 6f4b4d8a17..e1773eee97 100755
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -690,6 +690,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
ast2600-greatlakes.dtb \
ast2600-intel.dtb \
ast2600-intel.dtb \
+ ast2600-minerva.dtb \
ast2600-ncsi.dtb \
ast2600-p10bmc.dtb \
ast2600-pfr.dtb \
diff --git a/arch/arm/dts/ast2600-minerva.dts b/arch/arm/dts/ast2600-minerva.dts
new file mode 100644
index 0000000000..4f54cf7b7c
--- /dev/null
+++ b/arch/arm/dts/ast2600-minerva.dts
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2024 Meta Platforms Inc.
+/dts-v1/;
+
+#include "ast2600-u-boot.dtsi"
+
+/ {
+ model = "Facebook Minerva BMC";
+ compatible = "facebook,minerva-bmc", "aspeed,ast2600";
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ };
+
+ aliases {
+ spi0 = &fmc;
+ };
+
+ cpus {
+ cpu at 0 {
+ clock-frequency = <800000000>;
+ };
+ cpu at 1 {
+ clock-frequency = <800000000>;
+ };
+ };
+};
+
+&uart5 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&sdrammc {
+ clock-frequency = <400000000>;
+};
+
+&fmc {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fmcquad_default>;
+
+ flash at 0 {
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ };
+
+ flash at 1 {
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ };
+};
+
+&hace {
+ status = "okay";
+};
--
2.25.1
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