[linux dev-6.6 v1 3/3] arm64: dts: nuvoton: npcm8xx: add modules node
Tomer Maimon
tmaimon77 at gmail.com
Mon Jul 15 19:35:23 AEST 2024
Hi Andrew,
Thank for your comments
On Mon, 15 Jul 2024 at 11:27, Andrew Jeffery
<andrew at codeconstruct.com.au> wrote:
>
> On Sun, 2024-07-14 at 18:26 +0300, Tomer Maimon wrote:
> > Add the following modules nodes to Nuvoton NPCM8xx BMC device tree:
>
> So we seem to be missing bindings for the following nodes:
Sure.
>
> > - GMAC.
> > - OHCI
> > - PCIe.
> > - KCS.
> > - eSPI.
> > - JTAG master.
>
> Can you chop these out of the patch, or send the bindings for these
> nodes as part of the series, along with links to the corresponding
> upstream patch series?
>
> Also:
>
> > - BPC.
>
> What's BPC? I failed to map it to a node below, but possibly I didn't
> look closely enough.
BPC - BIOS Post Code, It was in dev-5.15 and removed I was sent the
BPC dev-6.6 a few months ago, and I will send it in a few days.
>
> > Signed-off-by: Tomer Maimon <tmaimon77 at gmail.com>
> > ---
> > .../dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 918 +++++++++++++++++-
> > .../boot/dts/nuvoton/nuvoton-npcm845.dtsi | 162 ++++
> > 2 files changed, 1075 insertions(+), 5 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
> > index 8aef313a6ff6..d733509cab90 100644
> > --- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
> > +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
> > @@ -21,6 +21,23 @@ soc {
> > gcr: system-controller at f0800000 {
> > compatible = "nuvoton,npcm845-gcr", "syscon";
> > reg = <0x0 0xf0800000 0x0 0x1000>;
> > + udc9_mux: mux-controller {
> > + compatible = "mmio-mux";
> > + #mux-control-cells = <1>;
> > + mux-reg-masks = <0x9C 0x3000>;
> > + idle-states = <0x3000>;
> > + };
> > + };
> > +
> > + rst: system-controller at f0801000 {
> > + compatible = "nuvoton,npcm845-rst", "syscon";
> > + reg = <0x0 0xf0801000 0x0 0xC4>;
> > + };
> > +
> > + fuse:fuse at f0189000 {
> > + compatible = "nuvoton,npcm845-fuse", "syscon",
> > + "simple-mfd";
> > + reg = <0x0 0xf0189000 0x0 0x1000>;
> > };
> >
> > gic: interrupt-controller at dfff9000 {
> > @@ -39,6 +56,12 @@ ppi_cluster0: interrupt-partition-0 {
> > };
> > };
> > };
> > +
> > + spswc: spswc at f0800038 {
> > + compatible = "nuvoton,npcm-sp-ctrl";
> > + reg = <0x0 0xf0800038 0x0 0x4>;
> > + };
> > +
> > };
> >
> > ahb {
> > @@ -62,15 +85,276 @@ clk: clock-controller at f0801000 {
> > clocks = <&refclk>;
> > };
> >
> > + gmac0: eth at f0802000 {
> > + device_type = "network";
> > + compatible = "nuvoton,npcm-dwmac";
> > + reg = <0x0 0xf0802000 0x0 0x2000>,
> > + <0x0 0xf0780000 0x0 0x200>;
> > + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "macirq";
> > + clocks = <&clk NPCM8XX_CLK_AHB>;
> > + clock-names = "stmmaceth";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&sg1mdio_pins>;
> > + status = "disabled";
> > + };
> > +
> > + gmac1: eth at f0804000 {
> > + device_type = "network";
> > + compatible = "snps,dwmac";
> > + reg = <0x0 0xf0804000 0x0 0x2000>;
> > + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "macirq";
> > + clocks = <&clk NPCM8XX_CLK_AHB>;
> > + clock-names = "stmmaceth";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&rg2_pins
> > + &rg2mdio_pins>;
> > + status = "disabled";
> > + };
> > +
> > + gmac2: eth at f0806000 {
> > + device_type = "network";
> > + compatible = "snps,dwmac";
> > + reg = <0x0 0xf0806000 0x0 0x2000>;
> > + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "macirq";
> > + clocks = <&clk NPCM8XX_CLK_AHB>;
> > + clock-names = "stmmaceth";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&r1_pins
> > + &r1err_pins
> > + &r1md_pins>;
> > + status = "disabled";
> > + };
> > +
> > + gmac3: eth at f0808000 {
> > + device_type = "network";
> > + compatible = "snps,dwmac";
> > + reg = <0x0 0xf0808000 0x0 0x2000>;
> > + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "macirq";
> > + clocks = <&clk NPCM8XX_CLK_AHB>;
> > + clock-names = "stmmaceth";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&r2_pins
> > + &r2err_pins
> > + &r2md_pins>;
> > + status = "disabled";
> > + };
> > +
> > + ehci1: usb at f0828100 {
> > + compatible = "nuvoton,npcm750-ehci";
> > + reg = <0x0 0xf0828100 0x0 0x1000>;
> > + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
> > + status = "disabled";
> > + };
> > +
> > + ehci2: usb at f082a100 {
> > + compatible = "nuvoton,npcm750-ehci";
> > + reg = <0x0 0xf082a100 0x0 0x1000>;
> > + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
> > + status = "disabled";
> > + };
> > +
> > + ohci1: usb at f0829000 {
> > + compatible = "nuvoton,npcm750-ohci", "generic-ohci";
> > + reg = <0x0 0xf0829000 0x0 0x1000>;
> > + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
> > + status = "disabled";
> > + };
> > +
> > + ohci2: usb at f082b000 {
> > + compatible = "nuvoton,npcm750-ohci", "generic-ohci";
> > + reg = <0x0 0xf082b000 0x0 0x1000>;
> > + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
> > + status = "disabled";
> > + };
> > +
> > + sdhci: mmc at f0842000 {
> > + compatible = "nuvoton,npcm845-sdhci";
> > + reg = <0x0 0xf0842000 0x0 0x100>;
> > + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk NPCM8XX_CLK_AHB>;
> > + clock-names = "clk_mmc";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&mmc8_pins
> > + &mmc_pins>;
> > + status = "disabled";
> > + };
> > +
> > + pcie: pcie at e1000000 {
> > + compatible = "nuvoton,npcm845-pcie";
> > + device_type = "pci";
> > + reg = <0x0 0xE1000000 0x0 0x1000>,
> > + <0x0 0xE8000000 0x0 0x1000>;
> > + bus-range = <0x0 0xF>;
> > + #address-cells = <3>;
> > + #size-cells = <2>;
> > + #interrupt-cells = <1>;
> > + ranges = <0x01000000 0 0xe9000000 0x0 0xe9000000 0 0x01000000
> > + 0x02000000 0 0xea000000 0x0 0xea000000 0 0x04000000>;
> > + resets = <&rstc 0x34 15>;
> > + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-map-mask = <0 0 0 7>;
> > + interrupt-map = <0 0 0 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> > + nuvoton,sysgcr = <&gcr>;
> > + };
> > +
> > + fiu0: spi at fb000000 {
> > + compatible = "nuvoton,npcm845-fiu";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x0 0xfb000000 0x0 0x1000>,
> > + <0x0 0x80000000 0x0 0x10000000>;
> > + reg-names = "control", "memory";
> > + clocks = <&clk NPCM8XX_CLK_SPI0>;
> > + clock-names = "clk_ahb";
> > + status = "disabled";
> > + };
> > +
> > + fiu1: spi at fb002000 {
> > + compatible = "nuvoton,npcm845-fiu";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x0 0xfb002000 0x0 0x1000>,
> > + <0x0 0x90000000 0x0 0x4000000>;
> > + reg-names = "control", "memory";
> > + clocks = <&clk NPCM8XX_CLK_SPI1>;
> > + clock-names = "clk_spi1";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&spi1_pins>;
> > + status = "disabled";
> > + };
> > +
> > + fiu3: spi at c0000000 {
> > + compatible = "nuvoton,npcm845-fiu";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x0 0xc0000000 0x0 0x1000>,
> > + <0x0 0xA0000000 0x0 0x20000000>;
> > + reg-names = "control", "memory";
> > + clocks = <&clk NPCM8XX_CLK_SPI3>;
> > + clock-names = "clk_spi3";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&spi3_pins>;
> > + status = "disabled";
> > + };
> > +
> > + fiux: spi at fb001000 {
> > + compatible = "nuvoton,npcm845-fiu";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x0 0xfb001000 0x0 0x1000>,
> > + <0x0 0xf8000000 0x0 0x2000000>;
> > + reg-names = "control", "memory";
> > + clocks = <&clk NPCM8XX_CLK_SPIX>;
> > + clock-names = "clk_ahb";
> > + status = "disabled";
> > + };
> > +
> > + pcimbox: pcimbox at f0848000 {
> > + compatible = "nuvoton,npcm845-pci-mbox", "nuvoton,npcm750-pci-mbox",
> > + "simple-mfd", "syscon";
> > + reg = <0x0 0xf084C000 0x0 0x8
> > + 0x0 0xf0848000 0x0 0x3F00>;
> > + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > +
> > + vcd: vcd at f0810000 {
> > + compatible = "nuvoton,npcm845-vcd";
> > + reg = <0x0 0xf0810000 0x0 0x10000>;
> > + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> > + resets = <&rstc 0x24 14>;
> > + nuvoton,sysgcr = <&gcr>;
> > + nuvoton,sysgfxi = <&gfxi>;
> > + nuvoton,ece = <&ece>;
> > + status = "disabled";
> > + };
> > +
> > + ece: video-codec at f0820000 {
> > + compatible = "nuvoton,npcm845-ece";
> > + reg = <0x0 0xf0820000 0x0 0x2000>;
> > + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> > + resets = <&rstc 0x24 13>;
> > + status = "disabled";
> > + };
> > +
> > apb {
> > #address-cells = <1>;
> > #size-cells = <1>;
> > compatible = "simple-bus";
> > interrupt-parent = <&gic>;
> > ranges = <0x0 0x0 0xf0000000 0x00300000>,
> > - <0xfff00000 0x0 0xfff00000 0x00016000>;
> > + <0xfff00000 0x0 0xfff00000 0x00016000>,
> > + <0xf0800000 0x0 0xf0800000 0x00060000>;
> > +
> > + lpc_kcs: lpc_kcs at 7000 {
> > + compatible = "nuvoton,npcm845-lpc-kcs",
> > + "simple-mfd", "syscon";
> > + reg = <0x7000 0x40>;
> > + reg-io-width = <1>;
> > +
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0x0 0x7000 0x40>;
> > +
> > + kcs1: kcs1 at 0 {
> > + compatible = "nuvoton,npcm845-kcs-bmc", "nuvoton,npcm750-kcs-bmc";
> > + reg = <0x0 0x40>;
> > + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> > + kcs_chan = <1>;
> > + status = "disabled";
> > + };
> >
> > - peci: peci-controller at 100000 {
>
> No compatible? Did you test this with `make dtbs_check`?
Will check it again
>
> > + kcs2: kcs2 at 0 {
> > + compatible = "nuvoton,npcm845-kcs-bmc", "nuvoton,npcm750-kcs-bmc";
> > + reg = <0x0 0x40>;
> > + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> > + kcs_chan = <2>;
> > + status = "disabled";
> > + };
> > +
> > + kcs3: kcs3 at 0 {
> > + compatible = "nuvoton,npcm845-kcs-bmc", "nuvoton,npcm750-kcs-bmc";
> > + reg = <0x0 0x40>;
> > + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> > + kcs_chan = <3>;
> > + status = "disabled";
> > + };
> > + };
> > +
> > + lpc_host: lpc_host at 7000 {
> > + compatible = "nuvoton,npcm845-lpc-host",
> > + "simple-mfd", "syscon";
> > + reg = <0x7000 0x60>;
> > +
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0x0 0x7000 0x60>;
> > +
> > + lpc_bpc: lpc_bpc at 40 {
> > + compatible = "nuvoton,npcm845-lpc-bpc", "nuvoton,npcm750-lpc-bpc";
> > + reg = <0x40 0x20>;
> > + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> > + status = "disabled";
> > + };
> > + };
> > +
> > + espi: espi at 9f000 {
> > + compatible = "nuvoton,npcm845-espi",
> > + "simple-mfd", "syscon";
> > + reg = <0x9f000 0x1000>;
> > + vw_gpio: vw_gpio {
> > + compatible = "nuvoton,npcm845-espi-vwgpio";
> > + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + status = "disabled";
> > + };
> > + };
> > +
> > + peci0: peci-controller at 100000 {
>
> Didn't we define this one above? Should they be merged?
Yes, my mistake will remove it.
>
> > compatible = "nuvoton,npcm845-peci";
> > reg = <0x100000 0x1000>;
> > interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> > @@ -79,6 +363,48 @@ peci: peci-controller at 100000 {
> > status = "disabled";
> > };
> >
> > + pspi: spi at 201000 {
> > + compatible = "nuvoton,npcm845-pspi";
> > + reg = <0x201000 0x1000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pspi_pins>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk NPCM8XX_CLK_APB5>;
> > + clock-names = "clk_apb5";
> > + resets = <&rstc 0x24 23>;
> > + status = "disabled";
> > + };
> > +
> > + jtm1: jtm at 208000 {
> > + compatible = "nuvoton,npcm845-jtm";
> > + reg = <0x208000 0x1000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&jm1_pins>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk NPCM8XX_CLK_APB5>;
> > + clock-names = "clk_apb5";
> > + resets = <&rstc 0x74 29>;
> > + status = "disabled";
> > + };
> > +
> > + jtm2: jtm at 209000 {
> > + compatible = "nuvoton,npcm845-jtm";
> > + reg = <0x209000 0x1000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&jm2_pins>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk NPCM8XX_CLK_APB5>;
> > + clock-names = "clk_apb5";
> > + resets = <&rstc 0x74 30>;
> > + status = "disabled";
> > + };
> > +
> > timer0: timer at 8000 {
> > compatible = "nuvoton,npcm845-timer";
> > interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> > @@ -126,27 +452,50 @@ serial3: serial at 3000 {
> > serial4: serial at 4000 {
> > compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
> > reg = <0x4000 0x1000>;
> > - clocks = <&clk NPCM8XX_CLK_UART>;
> > + clocks = <&clk NPCM8XX_CLK_UART2>;
> > interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
> > reg-shift = <2>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&bu4_pins>;
> > status = "disabled";
> > };
> >
> > serial5: serial at 5000 {
> > compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
> > reg = <0x5000 0x1000>;
> > - clocks = <&clk NPCM8XX_CLK_UART>;
> > + clocks = <&clk NPCM8XX_CLK_UART2>;
> > interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
> > reg-shift = <2>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&bu5_pins>;
> > status = "disabled";
> > };
> >
> > serial6: serial at 6000 {
> > compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
> > reg = <0x6000 0x1000>;
> > - clocks = <&clk NPCM8XX_CLK_UART>;
> > + clocks = <&clk NPCM8XX_CLK_UART2>;
>
> The UART clock changes seem somewhat unrelated and probably deserve
> their own patch?
O.K.
>
> > interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
> > reg-shift = <2>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&bu6_pins>;
> > + status = "disabled";
>
> This too.
O.K.
>
> Andrew
>
Thanks,
Tomer
More information about the openbmc
mailing list