[PATCH u-boot v2019.04-aspeed-openbmc] ARM: dts: aspeed: Add Ampere's BMC platform (AST2600)

[Chanh Nguyen]

Dear maintainers,

Just a gentle ping on the patch.
I’m eagerly awaiting your response. Please share with me your comments 
if you need to update anything.

Best Regards,
Chanh Nguyen

On 10/12/2023 11:25, Chanh Nguyen wrote:
> Add the initial version of the device tree for the Ampere BMC
> platform, which is equipped with the Aspeed AST2600 BMC SoC.
> 
> Signed-off-by: Chanh Nguyen <chanh at os.amperecomputing.com>
> ---
>   arch/arm/dts/Makefile           |   1 +
>   arch/arm/dts/ast2600-ampere.dts | 113 ++++++++++++++++++++++++++++++++
>   2 files changed, 114 insertions(+)
>   create mode 100644 arch/arm/dts/ast2600-ampere.dts
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 37675a3277..3642d59c89 100755
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -691,6 +691,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
>   	ast2600-greatlakes.dtb \
>   	ast2600-intel.dtb \
>   	ast2600-ncsi.dtb \
> +	ast2600-ampere.dtb \
>   	ast2600-p10bmc.dtb \
>   	ast2600-pfr.dtb \
>   	ast2600-qcom-dc-scm-v1.dtb \
> diff --git a/arch/arm/dts/ast2600-ampere.dts b/arch/arm/dts/ast2600-ampere.dts
> new file mode 100644
> index 0000000000..63088703a7
> --- /dev/null
> +++ b/arch/arm/dts/ast2600-ampere.dts
> @@ -0,0 +1,113 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +// Copyright (c) 2022, Ampere Computing LLC
> +/dts-v1/;
> +
> +#include "ast2600-u-boot.dtsi"
> +
> +/ {
> +	model = "AST2600 Ampere BMC";
> +	compatible = "aspeed,ast2600-ampere", "aspeed,ast2600";
> +
> +	memory {
> +		device_type = "memory";
> +		reg = <0x80000000 0x40000000>;
> +	};
> +
> +	chosen {
> +		stdout-path = &uart5;
> +	};
> +
> +	aliases {
> +		spi0 = &fmc;
> +		ethernet0 = &mac0;
> +	};
> +
> +	cpus {
> +		cpu at 0 {
> +			clock-frequency = <800000000>;
> +		};
> +		cpu at 1 {
> +			clock-frequency = <800000000>;
> +		};
> +	};
> +};
> +
> +&uart5 {
> +	u-boot,dm-pre-reloc;
> +	status = "okay";
> +};
> +
> +&sdrammc {
> +	clock-frequency = <400000000>;
> +};
> +
> +&wdt1 {
> +	status = "okay";
> +};
> +
> +&wdt2 {
> +	status = "okay";
> +};
> +
> +&wdt3 {
> +	status = "okay";
> +};
> +
> +&mdio {
> +	status = "okay";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_mdio1_default>;
> +
> +};
> +
> +&mac0 {
> +	status = "okay";
> +	phy-mode = "rgmii-rxid";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_rgmii1_default>;
> +};
> +
> +&fmc {
> +	status = "okay";
> +
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_fmcquad_default>;
> +
> +	flash at 0 {
> +		status = "okay";
> +		spi-max-frequency = <50000000>;
> +		spi-tx-bus-width = <4>;
> +		spi-rx-bus-width = <4>;
> +	};
> +
> +	flash at 1 {
> +		status = "okay";
> +		spi-max-frequency = <50000000>;
> +		spi-tx-bus-width = <4>;
> +		spi-rx-bus-width = <4>;
> +	};
> +};
> +
> +&scu {
> +	mac0-clk-delay = <0x10 0x0a
> +			  0x10 0x10
> +			  0x10 0x10>;
> +};
> +
> +&hace {
> +	u-boot,dm-pre-reloc;
> +	status = "okay";
> +};
> +
> +&acry {
> +	u-boot,dm-pre-reloc;
> +	status = "okay";
> +};
> +
> +&i2c4 {
> +	status = "okay";
> +};
> +
> +&i2c14 {
> +	status = "okay";
> +};