[PATCH linux dev-6.6 2/3] dt-bindings: hwmon: Support Aspeed g6 PWM TACH Control
Potin Lai
potin.lai.pt at gmail.com
Mon Apr 8 20:50:59 AEST 2024
From: Billy Tsai <billy_tsai at aspeedtech.com>
Document the compatible for aspeed,ast2600-pwm-tach device, which can
support up to 16 PWM outputs and 16 fan tach input.
Signed-off-by: Billy Tsai <billy_tsai at aspeedtech.com>
Reviewed-by: Rob Herring <robh at kernel.org>
---
.../bindings/hwmon/aspeed,g6-pwm-tach.yaml | 71 +++++++++++++++++++
1 file changed, 71 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml
diff --git a/Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml b/Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml
new file mode 100644
index 000000000000..9e5ed901ae54
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2023 Aspeed, Inc.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/hwmon/aspeed,g6-pwm-tach.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ASPEED G6 PWM and Fan Tach controller
+
+maintainers:
+ - Billy Tsai <billy_tsai at aspeedtech.com>
+
+description: |
+ The ASPEED PWM controller can support up to 16 PWM outputs.
+ The ASPEED Fan Tacho controller can support up to 16 fan tach input.
+ They are independent hardware blocks, which are different from the
+ previous version of the ASPEED chip.
+
+properties:
+ compatible:
+ enum:
+ - aspeed,ast2600-pwm-tach
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ "#pwm-cells":
+ const: 3
+
+patternProperties:
+ "^fan-[0-9]+$":
+ $ref: fan-common.yaml#
+ unevaluatedProperties: false
+ required:
+ - tach-ch
+
+required:
+ - reg
+ - clocks
+ - resets
+ - "#pwm-cells"
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/aspeed-clock.h>
+ pwm_tach: pwm-tach-controller at 1e610000 {
+ compatible = "aspeed,ast2600-pwm-tach";
+ reg = <0x1e610000 0x100>;
+ clocks = <&syscon ASPEED_CLK_AHB>;
+ resets = <&syscon ASPEED_RESET_PWM>;
+ #pwm-cells = <3>;
+
+ fan-0 {
+ tach-ch = /bits/ 8 <0x0>;
+ pwms = <&pwm_tach 0 40000 0>;
+ };
+
+ fan-1 {
+ tach-ch = /bits/ 8 <0x1 0x2>;
+ pwms = <&pwm_tach 1 40000 0>;
+ };
+ };
--
2.31.1
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