[PATCH u-boot v2019.04-aspeed-openbmc] board: ast2600: Add Inspur SCM V1 board
lintao1890 at 163.com
lintao1890 at 163.com
Wed Mar 29 12:00:06 AEDT 2023
From: LinTao <lintao.lc at inspur.com>
AST2600-INSPUR is an Inspur SCM V1 board which is
equipped with AST2600
Signed-off-by: LinTao <lintao.lc at inspur.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/ast2600-inspur-nf5280m7.dts | 190 +++++++++++++++++++++++
arch/arm/mach-aspeed/ast2600/Kconfig | 8 +
board/aspeed/ast2600_inspur/Kconfig | 13 ++
board/aspeed/ast2600_inspur/Makefile | 1 +
board/aspeed/ast2600_inspur/inspur.c | 22 +++
6 files changed, 235 insertions(+)
create mode 100644 arch/arm/dts/ast2600-inspur-nf5280m7.dts
create mode 100644 board/aspeed/ast2600_inspur/Kconfig
create mode 100644 board/aspeed/ast2600_inspur/Makefile
create mode 100644 board/aspeed/ast2600_inspur/inspur.c
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 6c34b83336..5632b599da 100755
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -696,6 +696,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
ast2600-tacoma.dtb \
ast2600-intel.dtb \
ast2600-tacoma.dtb
+ ast2600-inspur-nf5280m7.dtb
dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
diff --git a/arch/arm/dts/ast2600-inspur-nf5280m7.dts b/arch/arm/dts/ast2600-inspur-nf5280m7.dts
new file mode 100644
index 0000000000..8210797868
--- /dev/null
+++ b/arch/arm/dts/ast2600-inspur-nf5280m7.dts
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright 2023 Inspur Corp.
+/dts-v1/;
+
+#include "ast2600-u-boot.dtsi"
+
+/ {
+ model = "Inspur SCM V1";
+ compatible = "inspur,nf5280m7-bmc", "aspeed,ast2600";
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ };
+
+ aliases {
+ mmc0 = &emmc_slot0;
+ mmc1 = &sdhci_slot0;
+ mmc2 = &sdhci_slot1;
+ spi0 = &fmc;
+ spi1 = &spi1;
+ spi2 = &spi2;
+ ethernet1 = &mac1;
+ };
+
+ cpus {
+ cpu at 0 {
+ clock-frequency = <1200000000>;
+ };
+ cpu at 1 {
+ clock-frequency = <1200000000>;
+ };
+ };
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&uart5 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&sdrammc {
+ clock-frequency = <400000000>;
+};
+
+&mdio {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio2_default>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy0: ethernet-phy at 0 {
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy at 1 {
+ reg = <0>;
+ };
+
+ ethphy2: ethernet-phy at 2 {
+ reg = <0>;
+ };
+
+ ethphy3: ethernet-phy at 3 {
+ reg = <0>;
+ };
+};
+
+&mac1 {
+ status = "okay";
+ phy-mode = "rgmii";
+ phy-handle = <ðphy1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii2_default>;
+};
+
+&fmc {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fmcquad_default>;
+ flash at 0 {
+ status = "okay";
+ spi-max-frequency = <40000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+ flash at 1 {
+ status = "okay";
+ spi-max-frequency = <40000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+};
+
+&i2c1 {
+ status = "okay";
+ multi-master;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_default>;
+};
+
+&i2c4 {
+ status = "okay";
+ multi-master;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c5_default>;
+};
+
+&i2c5 {
+ status = "okay";
+ multi-master;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c6_default>;
+};
+
+&i2c6 {
+ status = "okay";
+ multi-master;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c7_default>;
+};
+
+&i2c7 {
+ status = "okay";
+ multi-master;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c8_default>;
+};
+
+&i2c8 {
+ status = "okay";
+ multi-master;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c9_default>;
+};
+
+&i2c9 {
+ status = "okay";
+ multi-master;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c10_default>;
+};
+
+&i2c12 {
+ status = "okay";
+ multi-master;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c13_default>;
+};
+
+&i2c13 {
+ status = "okay";
+ multi-master;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c14_default>;
+};
+
+&hace {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&acry {
+ u-boot,dm-pre-reloc;
+ status = "disabled";
+};
diff --git a/arch/arm/mach-aspeed/ast2600/Kconfig b/arch/arm/mach-aspeed/ast2600/Kconfig
index f5852afa77..db177399b9 100644
--- a/arch/arm/mach-aspeed/ast2600/Kconfig
+++ b/arch/arm/mach-aspeed/ast2600/Kconfig
@@ -51,6 +51,13 @@ config TARGET_QUALCOMM_DC_SCM_V1
QUALCOMM-DC-SCM-V1 is a Qualcomm DC-SCM V1 board which is
equipped with AST2600.
+config TARGET_AST2600_INSPUR
+ bool "AST2600-INSPUR"
+ depends on ASPEED_AST2600
+ help
+ AST2600-INSPUR is an Inspur SCM V1 board which is
+ equipped with AST2600.
+
endchoice
source "board/aspeed/evb_ast2600/Kconfig"
@@ -59,5 +66,6 @@ source "board/aspeed/slt_ast2600/Kconfig"
source "board/aspeed/ast2600_ibm/Kconfig"
source "board/aspeed/ast2600_intel/Kconfig"
source "board/qualcomm/dc-scm-v1/Kconfig"
+source "board/aspeed/ast2600_inspur/Kconfig"
endif
diff --git a/board/aspeed/ast2600_inspur/Kconfig b/board/aspeed/ast2600_inspur/Kconfig
new file mode 100644
index 0000000000..ef11a01bcc
--- /dev/null
+++ b/board/aspeed/ast2600_inspur/Kconfig
@@ -0,0 +1,13 @@
+if TARGET_AST2600_INSPUR
+
+config SYS_BOARD
+ default "ast2600_inspur"
+
+config SYS_VENDOR
+ default "aspeed"
+
+config SYS_CONFIG_NAME
+ string "board configuration name"
+ default "ast2600_inspur"
+
+endif
diff --git a/board/aspeed/ast2600_inspur/Makefile b/board/aspeed/ast2600_inspur/Makefile
new file mode 100644
index 0000000000..8af8692f3c
--- /dev/null
+++ b/board/aspeed/ast2600_inspur/Makefile
@@ -0,0 +1 @@
+obj-y += inspur.o
diff --git a/board/aspeed/ast2600_inspur/inspur.c b/board/aspeed/ast2600_inspur/inspur.c
new file mode 100644
index 0000000000..044a7c17c1
--- /dev/null
+++ b/board/aspeed/ast2600_inspur/inspur.c
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2023 Inspur Corp.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+#define AST_GPIO_BASE (0x1E780000)
+#define AST_GPIOABCD_DRCTN (AST_GPIO_BASE + 0x004)
+
+int board_late_init(void)
+{
+ u32 direction;
+
+ /* GPIOB[2] output*/
+ direction = readl(AST_GPIOABCD_DRCTN);
+ direction |= 0x700;
+ writel(direction, AST_GPIOABCD_DRCTN);
+
+ return 0;
+}
--
2.34.1
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