[PATCH] ARM: dts: rainier,everest: Move reserved memory regions

[Adriana Kobylak]

From: Adriana Kobylak <anoo at us.ibm.com>

Move the reserved regions to account for a decrease in DRAM when ECC is
enabled. ECC takes 1/9th of memory, bringing the size down from 1024MiB
to 912MiB (minus 16MiB for VGA) for a total of 896MiB available DRAM.

Move the regions by 128MiB since the flash_memory region needs to be
aligned to 64MiB. This change doesn't affect the host if ECC is not
enabled.

Signed-off-by: Adriana Kobylak <anoo at us.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 11 ++++++-----
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 12 ++++++++----
 2 files changed, 14 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
index 1bba5ad7378e..9a09301dd79e 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
@@ -163,15 +163,16 @@ reserved-memory {
 		ranges;
 
 		/* LPC FW cycle bridge region requires natural alignment */
-		flash_memory: region at b8000000 {
+		flash_memory: region at b0000000 {
 			no-map;
-			reg = <0xb8000000 0x04000000>; /* 64M */
+			reg = <0xb0000000 0x04000000>; /* 64M */
 		};
 
-		/* 48MB region from the end of flash to start of vga memory */
-		ramoops at bc000000 {
+		/* 176MB region from the end of flash to start of vga memory */
+
+		ramoops at b4000000 {
 			compatible = "ramoops";
-			reg = <0xbc000000 0x200000>; /* 16 * (4 * 0x8000) */
+			reg = <0xb4000000 0x200000>; /* 16 * (4 * 0x8000) */
 			record-size = <0x8000>;
 			console-size = <0x8000>;
 			ftrace-size = <0x8000>;
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 8bd2f441b159..01e7d8f46dc7 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -95,14 +95,17 @@ reserved-memory {
 		#size-cells = <1>;
 		ranges;
 
-		flash_memory: region at b8000000 {
+		/* LPC FW cycle bridge region requires natural alignment */
+		flash_memory: region at b0000000 {
 			no-map;
-			reg = <0xb8000000 0x04000000>; /* 64M */
+			reg = <0xb0000000 0x04000000>; /* 64M */
 		};
 
-		ramoops at bc000000 {
+		/* 176MB region from the end of flash to start of vga memory */
+
+		ramoops at b4000000 {
 			compatible = "ramoops";
-			reg = <0xbc000000 0x200000>; /* 16 * (4 * 0x8000) */
+			reg = <0xb4000000 0x200000>; /* 16 * (4 * 0x8000) */
 			record-size = <0x8000>;
 			console-size = <0x8000>;
 			ftrace-size = <0x8000>;
@@ -110,6 +113,7 @@ ramoops at bc000000 {
 			max-reason = <3>; /* KMSG_DUMP_EMERG */
 		};
 
+		/* VGA region is dictated by hardware strapping */
 		vga_memory: region at bf000000 {
 			no-map;
 			compatible = "shared-dma-pool";
-- 
2.25.1