[PATCH 01/18] ARM: dts: nspire: use lower case hex addresses in node unit addresses

Krzysztof Kozlowski krzysztof.kozlowski at canonical.com
Thu Mar 17 22:55:25 AEDT 2022


Convert all hex addresses in node unit addresses to lower case to fix
dt_binding_check and dtc W=1 warnings.

Conversion was done using sed:

  $ sed -e 's/@\([a-zA-Z0-9_-]*\) {/@\L\1 {/' -i arch/arm/boot/dts/nspire*
  $ sed -e 's/<0x\([a-zA-Z0-9_-]*\) /<0x\L\1 /g' -i arch/arm/boot/dts/nspire*

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski at canonical.com>
---
 arch/arm/boot/dts/nspire-classic.dtsi | 10 ++---
 arch/arm/boot/dts/nspire-cx.dts       |  4 +-
 arch/arm/boot/dts/nspire.dtsi         | 60 +++++++++++++--------------
 3 files changed, 37 insertions(+), 37 deletions(-)

diff --git a/arch/arm/boot/dts/nspire-classic.dtsi b/arch/arm/boot/dts/nspire-classic.dtsi
index 41744cc2bc72..01e1bb7c3c6c 100644
--- a/arch/arm/boot/dts/nspire-classic.dtsi
+++ b/arch/arm/boot/dts/nspire-classic.dtsi
@@ -17,7 +17,7 @@ clcd_pads: endpoint {
 
 &fast_timer {
 	/* compatible = "lsi,zevio-timer"; */
-	reg = <0x90010000 0x1000>, <0x900A0010 0x8>;
+	reg = <0x90010000 0x1000>, <0x900a0010 0x8>;
 };
 
 &uart {
@@ -30,12 +30,12 @@ &uart {
 
 &timer0 {
 	/* compatible = "lsi,zevio-timer"; */
-	reg = <0x900C0000 0x1000>, <0x900A0018 0x8>;
+	reg = <0x900c0000 0x1000>, <0x900a0018 0x8>;
 };
 
 &timer1 {
 	compatible = "lsi,zevio-timer";
-	reg = <0x900D0000 0x1000>, <0x900A0020 0x8>;
+	reg = <0x900d0000 0x1000>, <0x900a0020 0x8>;
 };
 
 &keypad {
@@ -66,10 +66,10 @@ ahb {
 		#address-cells = <1>;
 		#size-cells = <1>;
 
-		intc: interrupt-controller at DC000000 {
+		intc: interrupt-controller at dc000000 {
 			compatible = "lsi,zevio-intc";
 			interrupt-controller;
-			reg = <0xDC000000 0x1000>;
+			reg = <0xdc000000 0x1000>;
 			#interrupt-cells = <1>;
 		};
 	};
diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts
index 0c16b04e2744..590b7dff6ae5 100644
--- a/arch/arm/boot/dts/nspire-cx.dts
+++ b/arch/arm/boot/dts/nspire-cx.dts
@@ -92,10 +92,10 @@ ahb {
 		#address-cells = <1>;
 		#size-cells = <1>;
 
-		intc: interrupt-controller at DC000000 {
+		intc: interrupt-controller at dc000000 {
 			compatible = "arm,pl190-vic";
 			interrupt-controller;
-			reg = <0xDC000000 0x1000>;
+			reg = <0xdc000000 0x1000>;
 			#interrupt-cells = <1>;
 		};
 
diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi
index 90e033d9141f..bb240e6a3a6f 100644
--- a/arch/arm/boot/dts/nspire.dtsi
+++ b/arch/arm/boot/dts/nspire.dtsi
@@ -20,9 +20,9 @@ bootrom: bootrom at 0 {
 		reg = <0x00000000 0x80000>;
 	};
 
-	sram: sram at A4000000 {
+	sram: sram at a4000000 {
 		device = "memory";
-		reg = <0xA4000000 0x20000>;
+		reg = <0xa4000000 0x20000>;
 	};
 
 	timer_clk: timer_clk {
@@ -33,12 +33,12 @@ timer_clk: timer_clk {
 
 	base_clk: base_clk {
 		#clock-cells = <0>;
-		reg = <0x900B0024 0x4>;
+		reg = <0x900b0024 0x4>;
 	};
 
 	ahb_clk: ahb_clk {
 		#clock-cells = <0>;
-		reg = <0x900B0024 0x4>;
+		reg = <0x900b0024 0x4>;
 		clocks = <&base_clk>;
 	};
 
@@ -71,28 +71,28 @@ ahb {
 		#size-cells = <1>;
 		ranges;
 
-		spi: spi at A9000000 {
-			reg = <0xA9000000 0x1000>;
+		spi: spi at a9000000 {
+			reg = <0xa9000000 0x1000>;
 		};
 
-		usb0: usb at B0000000 {
+		usb0: usb at b0000000 {
 			compatible = "lsi,zevio-usb";
-			reg = <0xB0000000 0x1000>;
+			reg = <0xb0000000 0x1000>;
 			interrupts = <8>;
 
 			usb-phy = <&usb_phy>;
 			vbus-supply = <&vbus_reg>;
 		};
 
-		usb1: usb at B4000000 {
-			reg = <0xB4000000 0x1000>;
+		usb1: usb at b4000000 {
+			reg = <0xb4000000 0x1000>;
 			interrupts = <9>;
 			status = "disabled";
 		};
 
-		lcd: lcd at C0000000 {
+		lcd: lcd at c0000000 {
 			compatible = "arm,pl111", "arm,primecell";
-			reg = <0xC0000000 0x1000>;
+			reg = <0xc0000000 0x1000>;
 			interrupts = <21>;
 
 			/*
@@ -105,17 +105,17 @@ lcd: lcd at C0000000 {
 			clock-names = "clcdclk", "apb_pclk";
 		};
 
-		adc: adc at C4000000 {
-			reg = <0xC4000000 0x1000>;
+		adc: adc at c4000000 {
+			reg = <0xc4000000 0x1000>;
 			interrupts = <11>;
 		};
 
-		tdes: crypto at C8010000 {
-			reg = <0xC8010000 0x1000>;
+		tdes: crypto at c8010000 {
+			reg = <0xc8010000 0x1000>;
 		};
 
-		sha256: crypto at CC000000 {
-			reg = <0xCC000000 0x1000>;
+		sha256: crypto at cc000000 {
+			reg = <0xcc000000 0x1000>;
 		};
 
 		apb at 90000000 {
@@ -143,16 +143,16 @@ uart: serial at 90020000 {
 				interrupts = <1>;
 			};
 
-			timer0: timer at 900C0000 {
-				reg = <0x900C0000 0x1000>;
+			timer0: timer at 900c0000 {
+				reg = <0x900c0000 0x1000>;
 				clocks = <&timer_clk>, <&timer_clk>,
 					 <&timer_clk>;
 				clock-names = "timer0clk", "timer1clk",
 					      "apb_pclk";
 			};
 
-			timer1: timer at 900D0000 {
-				reg = <0x900D0000 0x1000>;
+			timer1: timer at 900d0000 {
+				reg = <0x900d0000 0x1000>;
 				interrupts = <19>;
 				clocks = <&timer_clk>, <&timer_clk>,
 					 <&timer_clk>;
@@ -171,18 +171,18 @@ rtc: rtc at 90090000 {
 				interrupts = <4>;
 			};
 
-			misc: misc at 900A0000 {
-				reg = <0x900A0000 0x1000>;
+			misc: misc at 900a0000 {
+				reg = <0x900a0000 0x1000>;
 			};
 
-			pwr: pwr at 900B0000 {
-				reg = <0x900B0000 0x1000>;
+			pwr: pwr at 900b0000 {
+				reg = <0x900b0000 0x1000>;
 				interrupts = <15>;
 			};
 
-			keypad: input at 900E0000 {
+			keypad: input at 900e0000 {
 				compatible = "ti,nspire-keypad";
-				reg = <0x900E0000 0x1000>;
+				reg = <0x900e0000 0x1000>;
 				interrupts = <16>;
 
 				scan-interval = <1000>;
@@ -191,8 +191,8 @@ keypad: input at 900E0000 {
 				clocks = <&apb_pclk>;
 			};
 
-			contrast: contrast at 900F0000 {
-				reg = <0x900F0000 0x1000>;
+			contrast: contrast at 900f0000 {
+				reg = <0x900f0000 0x1000>;
 			};
 
 			led: led at 90110000 {
-- 
2.32.0



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