[PATCH v3 08/11] i2c: npcm: Correct register access width

Andy Shevchenko andriy.shevchenko at linux.intel.com
Fri Mar 4 01:15:18 AEDT 2022


On Thu, Mar 03, 2022 at 02:54:27PM +0200, Tali Perry wrote:
> > On Thu, Mar 03, 2022 at 04:31:38PM +0800, Tyrone Ting wrote:
> > > From: Tyrone Ting <kfting at nuvoton.com>
> > >
> > > Use ioread8 instead of ioread32 to access the SMBnCTL3 register since
> > > the register is only 8-bit wide.
> >
> > > Fixes: 56a1485b102e ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver")
> >
> > No, this is bad commit message, since you have bitwise masks and there is
> > nothing to fix from functional point of view. So, why is this a fix?
> >
> 
> The next gen of this device is a 64 bit cpu.
> The module is and was 8 bit.
> 
> The ioread32 that seemed to work smoothly on a 32 bit machine
> was causing a panic on a 64 bit machine.
> since the module is 8 bit we changed to ioread8.
> This is working both for the 32 and 64 CPUs with no issue.

Then the commit message is completely wrong here.
And provide necessary (no need to have noisy commit messages)
bits of the oops to show what's going on

-- 
With Best Regards,
Andy Shevchenko




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