[PATCH u-boot v2019.04-aspeed-openbmc] ftgmac100: Remove unnecessary cache flush

[Joel Stanley]

On AST2400 (ARM9) platforms this would warn when the d-cache is enabled:

 CACHE: Misaligned operation at range [4d79f8e8, 4d79f928]

The flushing is not required, as we perform a flush of the entire
descriptor after setting txdes0.

Signed-off-by: Joel Stanley <joel at jms.id.au>
---
 drivers/net/ftgmac100.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 92170f52434e..11404c45eb5f 100644
--- a/drivers/net/ftgmac100.c
+++ b/drivers/net/ftgmac100.c
@@ -473,8 +473,6 @@ static int ftgmac100_send(struct udevice *dev, void *packet, int length)
 	ulong des_start = (ulong)curr_des;
 	ulong des_end = des_start +
 		roundup(sizeof(*curr_des), ARCH_DMA_MINALIGN);
-	ulong data_start;
-	ulong data_end;
 	int rc;
 
 	invalidate_dcache_range(des_start, des_end);
@@ -490,11 +488,6 @@ static int ftgmac100_send(struct udevice *dev, void *packet, int length)
 
 	curr_des->txdes3 = (unsigned int)packet;
 
-	/* Flush data to be sent */
-	data_start = curr_des->txdes3;
-	data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
-	flush_dcache_range(data_start, data_end);
-
 	/* Only one segment on TXBUF */
 	curr_des->txdes0 &= priv->txdes0_edotr_mask;
 	curr_des->txdes0 |= FTGMAC100_TXDES0_FTS |
-- 
2.35.1