[PATCH u-boot v2019.04-aspeed-openbmc v2] ARM: dts: aspeed: add Qualcomm DC-SCM V1
Joel Stanley
joel at jms.id.au
Tue Jun 7 11:05:09 AEST 2022
On Mon, 6 Jun 2022 at 13:56, Jae Hyun Yoo <quic_jaehyoo at quicinc.com> wrote:
>
> Ping
>
> On 5/19/2022 11:53 AM, Jae Hyun Yoo wrote:
> > From: Graeme Gregory <quic_ggregory at quicinc.com>
> >
> > Add initial version of device tree for Qualcomm DC-SCM V1 BMC which is
> > equipped with Aspeed AST2600 BMC SoC.
> >
> > Signed-off-by: Graeme Gregory <quic_ggregory at quicinc.com>
> > Signed-off-by: Jae Hyun Yoo <quic_jaehyoo at quicinc.com>
> > ---
> > Changes in v2:
> > * Changed vendor name from Nuvia to Qualcomm.
> >
> > arch/arm/dts/Makefile | 1 +
> > arch/arm/dts/ast2600-qcom-dc-scm-v1.dts | 208 ++++++++++++++++++++++++
> > 2 files changed, 209 insertions(+)
> > create mode 100644 arch/arm/dts/ast2600-qcom-dc-scm-v1.dts
> >
> > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > index 3515100c65ce..e86a6c0ed609 100755
> > --- a/arch/arm/dts/Makefile
> > +++ b/arch/arm/dts/Makefile
> > @@ -686,6 +686,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> > ast2600-intel.dtb \
> > ast2600-ncsi.dtb \
> > ast2600-pfr.dtb \
> > + ast2600-qcom-dc-scm-v1.dts \
> > ast2600-rainier.dtb \
> > ast2600-s6q.dtb \
> > ast2600-slt.dtb \
> > diff --git a/arch/arm/dts/ast2600-qcom-dc-scm-v1.dts b/arch/arm/dts/ast2600-qcom-dc-scm-v1.dts
> > new file mode 100644
> > index 000000000000..e966f739b708
> > --- /dev/null
> > +++ b/arch/arm/dts/ast2600-qcom-dc-scm-v1.dts
> > @@ -0,0 +1,208 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +// Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
> > +/dts-v1/;
> > +
> > +#include "ast2600-u-boot.dtsi"
> > +
> > +/ {
> > + model = "Qualcomm DC-SCM V1 BMC";
> > + compatible = "qcom,dc-scm-v1-bmc", "aspeed,ast2600";
> > +
> > + memory {
> > + device_type = "memory";
> > + reg = <0x80000000 0x40000000>;
> > + };
> > +
> > + chosen {
> > + stdout-path = &uart5;
> > + };
> > +
> > + aliases {
> > + spi0 = &fmc;
> > + spi1 = &spi1;
> > + spi2 = &spi2;
> > + };
> > +
> > + cpus {
> > + cpu at 0 {
> > + clock-frequency = <800000000>;
> > + };
> > + cpu at 1 {
> > + clock-frequency = <800000000>;
> > + };
> > + };
> > +};
> > +
> > +&uart5 {
> > + u-boot,dm-pre-reloc;
> > + status = "okay";
> > +};
> > +
> > +&sdrammc {
> > + clock-frequency = <400000000>;
> > +};
> > +
> > +&wdt1 {
> > + status = "okay";
> > +};
> > +
> > +&wdt2 {
> > + status = "okay";
> > +};
> > +
> > +&wdt3 {
> > + status = "okay";
> > +};
> > +
> > +&mdio {
> > + status = "okay";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_mdio4_default>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + ethphy3: ethernet-phy at 1 {
> > + reg = <1>;
> > + };
> > +};
> > +
> > +&mac2 {
> > + status = "okay";
> > + reg = <0x1e670000 0x180>, <0x1e650018 0x4>;
> > + phy-mode = "rgmii";
> > + phy-handle = <ðphy3>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_rgmii3_default>;
> > +};
> > +
> > +&fmc {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_fmcquad_default>;
> > +
> > + flash at 0 {
> > + compatible = "spi-flash", "sst,w25q256";
Compatible strings should go from the most general to the most
specific, so these are around the wrong way. I see you've probably
just copied the ast2600-evb which makes the same mistake.
In the dtsi we have jedec,spi-nor which you overwrite here.
u-boot has spi-flash but Linux uses jedec,spi-nor. I wonder if we
should update the aspeed driver to use that?
Cédric, do you have thoughts here?
> > + status = "okay";
> > + spi-max-frequency = <133000000>;
> > + spi-tx-bus-width = <4>;
> > + spi-rx-bus-width = <4>;
> > + };
> > +
> > + flash at 1 {
> > + compatible = "spi-flash", "sst,w25q256";
> > + status = "okay";
> > + spi-max-frequency = <133000000>;
> > + spi-tx-bus-width = <4>;
> > + spi-rx-bus-width = <4>;
> > + };
> > +};
> > +
> > +&spi1 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default
> > + &pinctrl_spi1cs1_default &pinctrl_spi1wp_default
> > + &pinctrl_spi1wp_default &pinctrl_spi1quad_default>;
> > +
> > + flash at 0 {
> > + compatible = "spi-flash", "sst,w25q256";
> > + status = "okay";
> > + spi-max-frequency = <133000000>;
> > + spi-tx-bus-width = <4>;
> > + spi-rx-bus-width = <4>;
> > + };
> > +};
> > +
> > +&i2c4 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c5_default>;
All of the pinctrl properties are set in the dtsi as of f2b82fa4ba17
("arm: dts: ast2600: Add I2C pinctrl"), so you can drop these.
> > +};
> > +
> > +&i2c5 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c6_default>;
> > +};
> > +
> > +&i2c6 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c7_default>;
> > +};
> > +
> > +&i2c7 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c8_default>;
> > +};
> > +
> > +&i2c8 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c9_default>;
> > +};
> > +
> > +&i2c9 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c10_default>;
> > +};
> > +
> > +&i2c10 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c11_default>;
> > +};
> > +
> > +&i2c12 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c13_default>;
> > +};
> > +
> > +&i2c13 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c14_default>;
> > +};
> > +
> > +&i2c14 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c15_default>;
> > +};
> > +
> > +&i2c15 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c16_default>;
> > +};
> > +
> > +&scu {
> > + mac0-clk-delay = <0x1d 0x1c
> > + 0x10 0x17
> > + 0x10 0x17>;
> > + mac1-clk-delay = <0x1d 0x10
> > + 0x10 0x10
> > + 0x10 0x10>;
> > + mac2-clk-delay = <0x0a 0x04
> > + 0x08 0x04
> > + 0x08 0x04>;
> > + mac3-clk-delay = <0x0a 0x04
> > + 0x08 0x04
> > + 0x08 0x04>;
> > +};
More information about the openbmc
mailing list