Propose a new application for reading DIMM SPD directly

[Patrick Williams]

On Wed, Feb 09, 2022 at 12:20:00PM -0800, Ed Tanous wrote:
> On Wed, Feb 9, 2022 at 11:56 AM Patrick Williams <patrick at stwcx.xyz> wrote:
> > On Tue, Feb 08, 2022 at 04:23:12PM +0800, Michael Shen wrote:
> > > On Tue, Feb 8, 2022 at 3:11 PM Patrick Williams <patrick at stwcx.xyz> wrote:
> > > > On Tue, Feb 08, 2022 at 01:10:37PM +0800, Michael Shen wrote:

> > > BIOS owns the MUX select pin and it can decide who owns the SPD(I2C/I3C) bus.
> > > From my understanding, BIOS only needs to read SPD during the POST stage.
> > > For the rest of time, BIOS will hand over the SPD bus to BMC.
> >
> > That seems like it might work.  You'll have to deal with the time when the BIOS
> > has the mux in the BMC code somehow.  Ideally I'd ask for the mux select to also
> > be fed to the BMC as an input GPIO so that you can differentiate between "we
> > don't own the mux" and "all the devices are NAKing us".
> 
> This seems like a nitty gritty design detail that's best handled in
> code when we review it.  I think the important bit here is that there
> are paths where this could work without a significant design issue.

Just one subtlety.  I wouldn't expect this, necessarily, to be in _our_ design
and/or code, except that we'd want to document the GPIO line like we do all
others.  I was trying to hint that "if I were involved in this hardware design,
I'd ask for...".  If you leave it out, I'm sure it'll work _most_ of the time
just fine and it'll be your problem to debug it when it doesn't.

-- 
Patrick Williams
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