[PATCH v1 4/6] i2c: npcm: Handle spurious interrupts

Jonathan Neuschäfer j.neuschaefer at gmx.net
Mon Feb 7 22:40:16 AEDT 2022


Hello,
some comments below.

On Mon, Feb 07, 2022 at 02:33:36PM +0800, Tyrone Ting wrote:
> From: Tali Perry <tali.perry1 at gmail.com>
> 
> In order to better handle spurious interrupts:
> 1. Disable incoming interrupts in master only mode.
> 2. Clear EOB after every interrupt.

For those who rarely deal with this particular I2C controller, please
add the meaning of EOB, e.g.: "2. Clear end of busy (EOB) after every interrupt"

> 3. Return correct status during interrupt.
> 
> Fixes: 56a1485b102e ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver")
> Signed-off-by: Tali Perry <tali.perry1 at gmail.com>
> Signed-off-by: Tyrone Ting <kfting at nuvoton.com>
> ---
>  drivers/i2c/busses/i2c-npcm7xx.c | 96 +++++++++++++++++++++-----------
>  1 file changed, 65 insertions(+), 31 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-npcm7xx.c b/drivers/i2c/busses/i2c-npcm7xx.c
> index 5c22e69afe34..1ddf309b91a3 100644
> --- a/drivers/i2c/busses/i2c-npcm7xx.c
> +++ b/drivers/i2c/busses/i2c-npcm7xx.c
> @@ -360,14 +360,14 @@ static int npcm_i2c_get_SCL(struct i2c_adapter *_adap)
>  {
>  	struct npcm_i2c *bus = container_of(_adap, struct npcm_i2c, adap);
>  
> -	return !!(I2CCTL3_SCL_LVL & ioread32(bus->reg + NPCM_I2CCTL3));
> +	return !!(I2CCTL3_SCL_LVL & ioread8(bus->reg + NPCM_I2CCTL3));
>  }
>  
>  static int npcm_i2c_get_SDA(struct i2c_adapter *_adap)
>  {
>  	struct npcm_i2c *bus = container_of(_adap, struct npcm_i2c, adap);
>  
> -	return !!(I2CCTL3_SDA_LVL & ioread32(bus->reg + NPCM_I2CCTL3));
> +	return !!(I2CCTL3_SDA_LVL & ioread8(bus->reg + NPCM_I2CCTL3));
>  }

This change seems unrelated and isn't mentioned in the commit message.
Please remove it or put it into a separate commit, or document the
motivation in the commit message.


>  
>  static inline u16 npcm_i2c_get_index(struct npcm_i2c *bus)
> @@ -564,6 +564,15 @@ static inline void npcm_i2c_nack(struct npcm_i2c *bus)
>  	iowrite8(val, bus->reg + NPCM_I2CCTL1);
>  }
>  
> +static inline void npcm_i2c_clear_master_status(struct npcm_i2c *bus)
> +{
> +	u8 val;
> +
> +	/* Clear NEGACK, STASTR and BER bits */
> +	val = NPCM_I2CST_BER | NPCM_I2CST_NEGACK | NPCM_I2CST_STASTR;
> +	iowrite8(val, bus->reg + NPCM_I2CST);

Small nitpick: Please keep the order the same between comment and code,
e.g.:

	/* Clear BER, NEGACK and STASTR bits */
	val = NPCM_I2CST_BER | NPCM_I2CST_NEGACK | NPCM_I2CST_STASTR;



Best regards,
Jonathan
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