[PATCH u-boot v2019.04-aspeed-openbmc v2 3/4] arm/mach-aspeed: Allow to disable WDT2

Patrick Rudolph patrick.rudolph at 9elements.com
Thu Apr 21 18:31:50 AEST 2022


The IBM Genesis3 supports booting from second flash using WDT2, but
there's no working code to poke the WDT2 and it takes too long for the
kernel to load to poke the watchdog.

As it's an evaluation platform disable this feature for now.
Unselecting this Kconfig disables the WDT2 in early platform code and
prevents 2nd firmware from being launched during normal boot.

Signed-off-by: Patrick Rudolph <patrick.rudolph at 9elements.com>
---
 arch/arm/mach-aspeed/ast2500/Kconfig    | 10 ++++++++++
 arch/arm/mach-aspeed/ast2500/platform.S |  6 ++----
 2 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-aspeed/ast2500/Kconfig b/arch/arm/mach-aspeed/ast2500/Kconfig
index e7ff00cdba..1882d6186e 100644
--- a/arch/arm/mach-aspeed/ast2500/Kconfig
+++ b/arch/arm/mach-aspeed/ast2500/Kconfig
@@ -23,6 +23,16 @@ config DRAM_UART_TO_UART1
 	help
 	  Route debug UART to TXD1/RXD1 pins.
 
+config FIRMWARE_2ND_BOOT
+	bool
+	default y
+	prompt "Keep WDT2 running to support the firmware 2nd boot"
+	help
+	  Saying yes here let the WDT2 running (if configured by
+	  hw straps) and allows the platform to boot from 2nd
+	  SPI flash if WDT2 isn't poked withing 22 seconds.
+	  Saying no disables the WDT2 in early platform initialisation.
+
 source "board/aspeed/evb_ast2500/Kconfig"
 
 endif
diff --git a/arch/arm/mach-aspeed/ast2500/platform.S b/arch/arm/mach-aspeed/ast2500/platform.S
index aef55c4a0a..a3961bc4f8 100644
--- a/arch/arm/mach-aspeed/ast2500/platform.S
+++ b/arch/arm/mach-aspeed/ast2500/platform.S
@@ -95,7 +95,7 @@
  *    CONFIG_DDR3_8GSTACK         // DDR3 8Gbit Stack die
  *    CONFIG_DDR4_4GX8            // DDR4 4Gbit X8 dual part
  * 5. Firmware 2nd boot flash
- *    CONFIG_FIRMWARE_2ND_BOOT (Removed)
+ *    CONFIG_FIRMWARE_2ND_BOOT
  * 6. Enable DRAM extended temperature range mode
  *    CONFIG_DRAM_EXT_TEMP
  * 7. Select WDT_Full mode for power up initial reset
@@ -642,13 +642,11 @@ bypass_USB_init:
 /******************************************************************************
  Disable WDT2 for 2nd boot function
  ******************************************************************************/
-/*
-#ifndef CONFIG_FIRMWARE_2ND_BOOT
+#if !defined(CONFIG_FIRMWARE_2ND_BOOT)
     ldr   r0, =0x1e78502c
     mov   r1, #0
     str   r1, [r0]
 #endif
-*/
 /******************************************************************************
  Disable WDT3 for SPI Address mode (3 or 4 bytes) detection function
  ******************************************************************************/
-- 
2.35.1



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