[PATCH u-boot v2019.04-aspeed-openbmc 3/4] arm/mach-aspeed: Allow to disable WDT2

Joel Stanley joel at jms.id.au
Thu Apr 21 15:54:53 AEST 2022


On Thu, 21 Apr 2022 at 05:42, Zev Weiss <zweiss at equinix.com> wrote:
>
> On Wed, Apr 20, 2022 at 03:25:01AM PDT, Patrick Rudolph wrote:
> >There's no working code to poke the WDT2 and it takes too long for the
> >kernel to load to poke the watchdog. Selecting this Kconfig disables
> >the WDT2 and prevents 2nd firmware from being launched during normal boot.
> >
>
> I seem to recall Lei Yu (CCed) hitting problems with watchdog timeouts a
> little while back, which I think ended up being due to caches being
> disabled for some reason...have you done any measurements to try to
> determine what's causing it to take so long?

Yes. Some work is required in this area:

 - re-enable the dcache for the 2500. It works fine, and speeds up boot.

 - pat the watchdog so it doesn't expire when loading, or sitting at
the command prompt

An alternative is to disable the watchdog as we've done here. I'd lean
towards leaving it running (as then if there's a hang, the system will
reobot and try again).

>
> >Signed-off-by: Patrick Rudolph <patrick.rudolph at 9elements.com>
> >---
> > arch/arm/mach-aspeed/ast2500/Kconfig    | 6 ++++++
> > arch/arm/mach-aspeed/ast2500/platform.S | 6 ++----
> > 2 files changed, 8 insertions(+), 4 deletions(-)
> >
> >diff --git a/arch/arm/mach-aspeed/ast2500/Kconfig b/arch/arm/mach-aspeed/ast2500/Kconfig
> >index 232117b43c..a9d880e557 100644
> >--- a/arch/arm/mach-aspeed/ast2500/Kconfig
> >+++ b/arch/arm/mach-aspeed/ast2500/Kconfig
> >@@ -33,6 +33,12 @@ config DRAM_UART_TO_UART1
> >       help
> >         Route debug UART to TXD1/RXD1 pins.
> >
> >+config FIRMWARE_DISABLE_2ND_BOOT
> >+      bool
> >+      prompt "Do not disable WDT2 for 2nd boot function"
> >+      help
> >+        Do not disable WDT2 for 2nd boot function.
>
> This seems a bit confusing -- for one thing, the config symbol name and
> the prompt/help text sound like opposites (one says "disable", the
> others say "do not disable").  A slightly more detailed explanation
> might be good.

+1, can you explain why you renamed the option when adding it to kconfig?

>
> >+
> > source "board/aspeed/evb_ast2500/Kconfig"
> > source "board/ibm/genesis3/Kconfig"
> >
> >diff --git a/arch/arm/mach-aspeed/ast2500/platform.S b/arch/arm/mach-aspeed/ast2500/platform.S
> >index aef55c4a0a..3eb9ee9419 100644
> >--- a/arch/arm/mach-aspeed/ast2500/platform.S
> >+++ b/arch/arm/mach-aspeed/ast2500/platform.S
> >@@ -95,7 +95,7 @@
> >  *    CONFIG_DDR3_8GSTACK         // DDR3 8Gbit Stack die
> >  *    CONFIG_DDR4_4GX8            // DDR4 4Gbit X8 dual part
> >  * 5. Firmware 2nd boot flash
> >- *    CONFIG_FIRMWARE_2ND_BOOT (Removed)
> >+ *    CONFIG_FIRMWARE_DISABLE_2ND_BOOT
> >  * 6. Enable DRAM extended temperature range mode
> >  *    CONFIG_DRAM_EXT_TEMP
> >  * 7. Select WDT_Full mode for power up initial reset
> >@@ -642,13 +642,11 @@ bypass_USB_init:
> > /******************************************************************************
> >  Disable WDT2 for 2nd boot function
> >  ******************************************************************************/
> >-/*
> >-#ifndef CONFIG_FIRMWARE_2ND_BOOT
> >+#if CONFIG_FIRMWARE_DISABLE_2ND_BOOT
> >     ldr   r0, =0x1e78502c
> >     mov   r1, #0
> >     str   r1, [r0]
> > #endif
> >-*/
> > /******************************************************************************
> >  Disable WDT3 for SPI Address mode (3 or 4 bytes) detection function
> >  ******************************************************************************/
> >--
> >2.35.1
> >


More information about the openbmc mailing list