[PATCH u-boot v2019.04-aspeed-openbmc v2] aspeed: add CONFIG_ASPEED_ENABLE_BACKDOORS

Woloschin, Ian iwolosch at akamai.com
Tue Apr 19 21:10:32 AEST 2022


Yup, I'm pretty sure my systems need SuperIO to configure the serial ports which we do use, though I'll be the first to admit I do not entirely understand how any of this is actually configured.

-Ian

On 4/18/22, 10:33 PM, "Ryan Chen" <ryan_chen at aspeedtech.com> wrote:

    Hello,
    	Yes, leave SCU70[20] =0, set HICR5[8] = 0, HICRB[6] = 1 is enough to disable LPC2AHB.
    	HICR5[6] is LPC fw cycle it is allowed.

    Ryan

    > -----Original Message-----
    > From: Zev Weiss <zev at bewilderbeest.net>
    > Sent: Tuesday, April 19, 2022 9:00 AM
    > To: Ryan Chen <ryan_chen at aspeedtech.com>
    > Cc: Joel Stanley <joel at jms.id.au>; openbmc at lists.ozlabs.org; Andrew Jeffery
    > <andrew at aj.id.au>; Ian Woloschin <ian.woloschin at akamai.com>
    > Subject: Re: [PATCH u-boot v2019.04-aspeed-openbmc v2] aspeed: add
    > CONFIG_ASPEED_ENABLE_BACKDOORS
    > 
    > On Fri, Apr 15, 2022 at 01:11:09AM PDT, Ryan Chen wrote:
    > >Hello,
    > >	Thanks your response.
    > >	And yes, I prefer apply patch without any config to disable it.
    > >
    > >Ryan
    > >
    > 
    > After thinking about this a bit more, I remembered that Ian Woloschin
    > (CCed) had mentioned at some point that the systems he works with do in fact
    > use the AST2500's built-in Super-IO, and hence would presumably be broken by
    > a patch that unconditionally disabled that.  And in contrast, the ASRock boards
    > I've been working with require the AST2500 Super-IO to be disabled for the
    > host to boot properly, so it seems like we'll need
    > *some* minimal amount of configurability to support at least those two
    > classes of systems (i.e. a Kconfig boolean that determines whether the
    > Super-IO should be enabled or disabled).
    > 
    > I don't know offhand what the interactions between SCU70[20], HICRB[6], and
    > HICR5[10] are though, and I don't have any hardware that actually uses the
    > AST2500 Super-IO to test with.  Would leaving SCU70[20]=0 to enable the
    > Super-IO while leaving HICRB[6]=1 and HICR5[10]=0 work for systems like
    > Ian's to enable the Super-IO while keeping everything else locked down as
    > much as possible?
    > 
    > 
    > Zev




More information about the openbmc mailing list