[PATCH linux dev-5.10] ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address
Konstantin Aladyshev
aladyshev22 at gmail.com
Thu Sep 9 22:57:02 AEST 2021
AMD EthanolX CRB uses 2-byte POST codes which are sent to ports 0x80/0x81.
Currently ASPEED controller snoops only 0x80 port and therefore captures
only the lower byte of each POST code.
Enable secondary LPC snooping address to capture the higher byte of POST
codes.
Signed-off-by: Konstantin Aladyshev <aladyshev22 at gmail.com>
Reviewed-by: Andrew Jeffery <andrew at aj.id.au>
Link: https://lore.kernel.org/r/20210127182326.424-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel at jms.id.au>
---
arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
index 96ff0aea64e5..ac2d04cfaf2f 100644
--- a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
@@ -218,7 +218,7 @@ &kcs4 {
&lpc_snoop {
status = "okay";
- snoop-ports = <0x80>;
+ snoop-ports = <0x80>, <0x81>;
};
&lpc_ctrl {
--
2.25.1
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