[PATCH dev-5.14 v1] ARM: dts: nuvoton: gbs: split SPI flash partition

George Hung ghung.quanta at gmail.com
Fri Oct 8 16:30:06 AEDT 2021


Split the primary and secondary BIOS SPI EEPROMs in 2 partitions

Signed-off-by: George Hung <george.hung at quantatw.com>
---
 arch/arm/boot/dts/nuvoton-npcm730-gbs.dts | 27 +++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts b/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
index eb6eb21cb2a4..f20c2ae4f576 100644
--- a/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
+++ b/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
@@ -415,6 +415,19 @@ spi-nor at 0 {
 		spi-rx-bus-width = <2>;
 		m25p,fast-read;
 		label = "pnor";
+		partitions at a0000000 {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			pnor-primary at 0 {
+				label = "pnor-primary";
+				reg = <0x0000000 0x2000000>;
+			};
+			pnor-scratch at 2000000 {
+				label = "pnor-scratch";
+				reg = <0x2000000 0x2000000>;
+			};
+		};
 	};
 	spi-nor at 1 {
 		compatible = "jedec,spi-nor";
@@ -424,6 +437,20 @@ spi-nor at 1 {
 		spi-max-frequency = <50000000>;
 		spi-rx-bus-width = <2>;
 		m25p,fast-read;
+		label = "pnor-2";
+		partitions at a0000000 {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			pnor-primary at 0 {
+				label = "pnor-2-primary";
+				reg = <0x0000000 0x2000000>;
+			};
+			pnor-scratch at 2000000 {
+				label = "pnor-2-scratch";
+				reg = <0x2000000 0x2000000>;
+			};
+		};
 	};
 };
 
-- 
2.32.0



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