[PATCH 3/8] ARM: dts: wpcm450: Add global control registers (GCR) node
j.neuschaefer at gmx.net
Sun Jun 13 19:23:04 AEST 2021
On Fri, Jun 04, 2021 at 10:01:07AM +0200, Linus Walleij wrote:
> On Wed, Jun 2, 2021 at 2:04 PM Jonathan Neuschäfer
> <j.neuschaefer at gmx.net> wrote:
> > The Global Control Registers (GCR) are a block of registers in Nuvoton
> > SoCs that expose misc functionality such as chip model and version
> > information or pinmux settings.
> > This patch adds a GCR node to nuvoton-wpcm450.dtsi in preparation for
> > enabling pinctrl on this SoC.
> > Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
> As noted I would name this architecture-neutral with
> syscon at ...
-------------- next part --------------
A non-text attachment was scrubbed...
Size: 833 bytes
Desc: not available
More information about the openbmc