[PATCH u-boot v2019.04-aspeed-openbmc 07/11] hash: Allow for SHA512 hardware implementations
Joel Stanley
joel at jms.id.au
Tue Apr 13 18:07:51 AEST 2021
Similar to support for SHA1 and SHA256, allow the use of hardware hashing
engine by enabling the algorithm and setting CONFIG_SHA_HW_ACCEL /
CONFIG_SHA_PROG_HW_ACCEL.
Signed-off-by: Joel Stanley <joel at jms.id.au>
---
common/hash.c | 24 ++++++++++++++++++++++--
include/hw_sha.h | 26 ++++++++++++++++++++++++++
lib/Kconfig | 15 +++++++--------
3 files changed, 55 insertions(+), 10 deletions(-)
diff --git a/common/hash.c b/common/hash.c
index c00ec4d36c41..a19cba07d779 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -86,7 +86,7 @@ static int hash_finish_sha256(struct hash_algo *algo, void *ctx, void
}
#endif
-#if defined(CONFIG_SHA384)
+#if defined(CONFIG_SHA384) && !defined(CONFIG_SHA_PROG_HW_ACCEL)
static int hash_init_sha384(struct hash_algo *algo, void **ctxp)
{
sha512_context *ctx = malloc(sizeof(sha512_context));
@@ -114,7 +114,7 @@ static int hash_finish_sha384(struct hash_algo *algo, void *ctx, void
}
#endif
-#if defined(CONFIG_SHA512)
+#if defined(CONFIG_SHA512) && !defined(CONFIG_SHA_PROG_HW_ACCEL)
static int hash_init_sha512(struct hash_algo *algo, void **ctxp)
{
sha512_context *ctx = malloc(sizeof(sha512_context));
@@ -249,10 +249,20 @@ static struct hash_algo hash_algo[] = {
.name = "sha384",
.digest_size = SHA384_SUM_LEN,
.chunk_size = CHUNKSZ_SHA384,
+#ifdef CONFIG_SHA_HW_ACCEL
+ .hash_func_ws = hw_sha384,
+#else
.hash_func_ws = sha384_csum_wd,
+#endif
+#ifdef CONFIG_SHA_PROG_HW_ACCEL
+ .hash_init = hw_sha_init,
+ .hash_update = hw_sha_update,
+ .hash_finish = hw_sha_finish,
+#else
.hash_init = hash_init_sha384,
.hash_update = hash_update_sha384,
.hash_finish = hash_finish_sha384,
+#endif
},
#endif
#ifdef CONFIG_SHA512
@@ -260,10 +270,20 @@ static struct hash_algo hash_algo[] = {
.name = "sha512",
.digest_size = SHA512_SUM_LEN,
.chunk_size = CHUNKSZ_SHA512,
+#ifdef CONFIG_SHA_HW_ACCEL
+ .hash_func_ws = hw_sha512,
+#else
.hash_func_ws = sha512_csum_wd,
+#endif
+#ifdef CONFIG_SHA_PROG_HW_ACCEL
+ .hash_init = hw_sha_init,
+ .hash_update = hw_sha_update,
+ .hash_finish = hw_sha_finish,
+#else
.hash_init = hash_init_sha512,
.hash_update = hash_update_sha512,
.hash_finish = hash_finish_sha512,
+#endif
},
#endif
{
diff --git a/include/hw_sha.h b/include/hw_sha.h
index 991e496a3cb2..8cdf821218a0 100644
--- a/include/hw_sha.h
+++ b/include/hw_sha.h
@@ -8,6 +8,32 @@
#define __HW_SHA_H
#include <hash.h>
+/**
+ * Computes hash value of input pbuf using h/w acceleration
+ *
+ * @param in_addr A pointer to the input buffer
+ * @param bufleni Byte length of input buffer
+ * @param out_addr A pointer to the output buffer. When complete
+ * 64 bytes are copied to pout[0]...pout[63]. Thus, a user
+ * should allocate at least 64 bytes at pOut in advance.
+ * @param chunk_size chunk size for sha512
+ */
+void hw_sha512(const uchar * in_addr, uint buflen,
+ uchar * out_addr, uint chunk_size);
+
+/**
+ * Computes hash value of input pbuf using h/w acceleration
+ *
+ * @param in_addr A pointer to the input buffer
+ * @param bufleni Byte length of input buffer
+ * @param out_addr A pointer to the output buffer. When complete
+ * 48 bytes are copied to pout[0]...pout[47]. Thus, a user
+ * should allocate at least 48 bytes at pOut in advance.
+ * @param chunk_size chunk size for sha384
+ */
+void hw_sha384(const uchar * in_addr, uint buflen,
+ uchar * out_addr, uint chunk_size);
+
/**
* Computes hash value of input pbuf using h/w acceleration
*
diff --git a/lib/Kconfig b/lib/Kconfig
index 984a783fd16f..f77272d0a94a 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -273,19 +273,18 @@ config SHA384
config SHA_HW_ACCEL
bool "Enable hashing using hardware"
help
- This option enables hardware acceleration
- for SHA1/SHA256 hashing.
- This affects the 'hash' command and also the
- hash_lookup_algo() function.
+ This option enables hardware acceleration for SHA hashing.
+ This affects the 'hash' command and also the hash_lookup_algo()
+ function.
config SHA_PROG_HW_ACCEL
bool "Enable Progressive hashing support using hardware"
depends on SHA_HW_ACCEL
help
- This option enables hardware-acceleration for
- SHA1/SHA256 progressive hashing.
- Data can be streamed in a block at a time and the hashing
- is performed in hardware.
+ This option enables hardware-acceleration for SHA progressive
+ hashing.
+ Data can be streamed in a block at a time and the hashing is
+ performed in hardware.
config MD5
bool
--
2.30.2
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