[PATCH linux dev-5.7 2/6] spi: fsi: Fix clock running too fast

[Eddie James]

On 7/29/20 6:25 PM, Joel Stanley wrote:
> On Wed, 29 Jul 2020 at 20:45, Eddie James <eajames at linux.ibm.com> wrote:
>> From: Brad Bishop <bradleyb at fuzziesquirrel.com>
>>
>> Use a clock divider tuned to a 200MHz FSI clock.  Use of the previous
>> divider at 200MHz results in corrupt data from endpoint devices. Ideally
>> the clock divider would be calculated from the FSI clock, but that
>> would require some significant work on the FSI driver.
> This sounds like something we should fix, especially if we're
> experimenting between 200/166/100 MHz FSI clocks?


Yes, but I figured that can be done later. Since 200 is the fastest, 
then using 19 will be safe until we can find the time to implement the 
clock division properly.


Thanks,

Eddie


>
>> Signed-off-by: Eddie James <eajames at linux.ibm.com>
>> Signed-off-by: Brad Bishop <bradleyb at fuzziesquirrel.com>
>> ---
>>   drivers/spi/spi-fsi.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/spi/spi-fsi.c b/drivers/spi/spi-fsi.c
>> index 8f64af0140e0..559d0ff981f3 100644
>> --- a/drivers/spi/spi-fsi.c
>> +++ b/drivers/spi/spi-fsi.c
>> @@ -350,7 +350,7 @@ static int fsi_spi_transfer_init(struct fsi_spi *ctx)
>>          u64 status = 0ULL;
>>          u64 wanted_clock_cfg = SPI_FSI_CLOCK_CFG_ECC_DISABLE |
>>                  SPI_FSI_CLOCK_CFG_SCK_NO_DEL |
>> -               FIELD_PREP(SPI_FSI_CLOCK_CFG_SCK_DIV, 4);
>> +               FIELD_PREP(SPI_FSI_CLOCK_CFG_SCK_DIV, 19);
>>
>>          end = jiffies + msecs_to_jiffies(SPI_FSI_INIT_TIMEOUT_MS);
>>          do {
>> --
>> 2.24.0
>>