[PATCH linux hwmon-next v5 3/3] dt-bindings: (hwmon/sbtsi_tmep) Add SB-TSI hwmon driver bindings

[Kun Yi]

On Fri, Dec 11, 2020 at 3:51 PM Guenter Roeck <linux at roeck-us.net> wrote:
>
> On 12/11/20 1:54 PM, Kun Yi wrote:
> > Document device tree bindings for AMD SB-TSI emulated temperature
> > sensor.
> >
> > Signed-off-by: Kun Yi <kunyi at google.com>
>
> Any reason for dropping Rob's Reviewed-by: tag ?
>
> Guenter

Sorry that was unintentional.

>
> > ---
> >  .../devicetree/bindings/hwmon/amd,sbtsi.yaml  | 54 +++++++++++++++++++
> >  1 file changed, 54 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml b/Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml
> > new file mode 100644
> > index 000000000000..446b09f1ce94
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml
> > @@ -0,0 +1,54 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/hwmon/amd,sbtsi.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: >
> > +  Sideband interface Temperature Sensor Interface (SB-TSI) compliant
> > +  AMD SoC temperature device
> > +
> > +maintainers:
> > +  - Kun Yi <kunyi at google.com>
> > +  - Supreeth Venkatesh <supreeth.venkatesh at amd.com>
> > +
> > +description: |
> > +  SB Temperature Sensor Interface (SB-TSI) is an SMBus compatible
> > +  interface that reports AMD SoC's Ttcl (normalized temperature),
> > +  and resembles a typical 8-pin remote temperature sensor's I2C interface
> > +  to BMC. The emulated thermal sensor can report temperatures in increments
> > +  of 0.125 degrees, ranging from 0 to 255.875.
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - amd,sbtsi
> > +
> > +  reg:
> > +    maxItems: 1
> > +    description: |
> > +      I2C bus address of the device as specified in Section 6.3.1 of the
> > +      SoC register reference. The SB-TSI address is normally 98h for socket
> > +      0 and 90h for socket 1, but it could vary based on hardware address
> > +      select pins.
> > +      \[open source SoC register reference\]
> > +        https://www.amd.com/system/files/TechDocs/56255_OSRR.pdf
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    i2c0 {
> > +        #address-cells = <1>;
> > +        #size-cells = <0>;
> > +
> > +        sbtsi at 4c {
> > +                compatible = "amd,sbtsi";
> > +                reg = <0x4c>;
> > +        };
> > +    };
> > +...
> >
>


-- 
Regards,
Kun