Query regarding the host LPC address in phosphor-ipmi-flash

Patrick Venture venture at google.com
Sat Aug 8 01:35:35 AEST 2020


On Tue, Aug 4, 2020 at 11:11 AM Connie Yin <ConnieY at ami.com> wrote:
>
> Hi, Patrick,
>
> Thanks a lot for the replay.
>
> I got an e820 map of this x86 system (with aspeed ast2500) as follows, and chose the host-lpc address as 0xfe410000 (Unused) alongwith --length 0x10000
>
> +-------------------------------------------------------------------------+
>   | Size        | Start       | End         | Usage                         |
>   | 16 MB       | 0xFD000000  | 0xFDFFFFFF  | SBREG                         |
>   | 64 KB       | 0xFE000000  | 0xFE00FFFF  | PMC MBAR                      |
>   | 4 KB        | 0xFE010000  | 0xFE010FFF  | SPI BAR0                      |
>   | 88 KB       | 0xFE020000  | 0xFE035FFF  | SerialIo BAR in ACPI mode     |
>   | 24 KB       | 0xFE036000  | 0xFE03BFFF  | Unused                        |
>   | 4 KB        | 0xFE03C000  | 0xFE03CFFF  | Thermal Device in ACPI mode   |
>   | 524 KB      | 0xFE03D000  | 0xFE0BFFFF  | Unused                        |
>   | 256 KB      | 0xFE0C0000  | 0xFE0FFFFF  | TraceHub FW BAR               |
>   | 1 MB        | 0xFE100000  | 0xFE1FFFFF  | TraceHub MTB BAR              |
>   | 2 MB        | 0xFE200000  | 0xFE3FFFFF  | TraceHub SW BAR               |
>   | 64 KB       | 0xFE400000  | 0xFE40FFFF  | CIO2 MMIO BAR in ACPI mode    |
>   | 2 MB - 64KB | 0xFE410000  | 0xFE5FFFFF  | Unused                        |
>   | 2 MB        | 0xFE600000  | 0xFE7FFFFF  | Temp address                  |
>   +-------------------------------------------------------------------------+
>
> And configured in BMC with these lines:
>
> PACKAGECONFIG_append_xxx = " static-bmc"
> PACKAGECONFIG_append_xxx = " aspeed-lpc"
> PACKAGECONFIG_append_xxx = " reboot-update"
> IPMI_FLASH_BMC_ADDRESS_xxx = "0x83000000"

What's your device tree have for the lpc address?  It should be
configured in there as well, see
https://github.com/openbmc/linux/blob/dev-5.7/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts#L27
and:

&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi1>;
};

If this is configured as well, then it should work, although try
0x1000 instead of 0x10000 - even though you've set aside 64KiB.  Just
as something to try.

>
>
> And ran this app on host:
>
> ./burn_my_bmc
>  --command update \
>  --interface ipmilpc \
>  --image image-bmc \
>  --sig image-bmc.sig \
>  --type image \
>  --address 0xfe41000 \
>  --length 0x10000
>
>
> Sending over the firmware image.
> sending writeMeta
> writemeta sent
> Progress: 100.00%
> Sending over the hash file.
> sending writeMeta
> writemeta sent
> Progress: 100.00%
> Opening the verification file
> Committing to /flash/verify to trigger service
> Calling stat on /flash/verify session to check status
> running
> success
> Returned success
> succeeded

So this means whatever validation service returned success.  What is
your validation service?  I ask because this will be useful to address
early - so that while you're getting the wrong bytes, you don't
accidentally update your bmc.

> Opening the update file
> Committing to /flash/update to trigger service
> Calling stat on /flash/update session to check status
> running
> Opening the cleanup blob
> Exception received: blob exception received: Received IPMI_CC: 255
>
>
>
>
> I was able to see there was a 32M size of image-bmc had been uploaded under /run/initramfs, but by using hexdump -C, finding this uploaded file was not the correct image data as expected.

Interesting, so

>
> Do you have any suggestions?
>
>
> Thanks,
> Connie
>
>
>
>
>
>
>
>
>
> -----Original Message-----
> From: Patrick Venture [mailto:venture at google.com]
> Sent: Friday, July 31, 2020 3:57 PM
> To: Connie Yin
> Cc: openbmc at lists.ozlabs.org
> Subject: Re: Query regarding the host LPC address in phosphor-ipmi-flash
>
> On Fri, Jul 31, 2020 at 11:21 AM Connie Yin <ConnieY at ami.com> wrote:
> >
> > Hi, Team,
> >
> >
> >
> > I am checking this OpemBMC firmware update interface on an x86 system, and wondering how to construct this host LPC address at which the chunk is to be mapped.
> >
> > I saw once when test on some platform,  0xfedc1000 was used as host LPC address.
> >
> >
> >
> > Would anyone please elaborate a little bit more?  To get this host LPC address,  should I add/modify some drivers in BMC? What about host side?
>
> The host-side address is a region set aside in the BIOS that gets
> reserved in the e820 map.  The BiOS dev adds it manually for this
> purpose.
>
> >
> >
> >
> >
> >
> > Thanks a lot.
> >
> > Connie
> >
> > P Please consider the environment before printing this email
> >
> > The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.
>
> Please consider the environment before printing this email.
>
> The information contained in this message may be confidential and proprietary to American Megatrends (AMI).  This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited.  Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.


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