Hi Fran,
This is looking good. Just a few small changes.
On Thu, May 16, 2019 at 4:14 AM Fran Hsu <franhsutw at gmail.com> wrote:
>
> Quanta GSJ BMC uses the Nuvoton NPCM730 soc.
> Commit the Quanta GSJ device tree for Arm dts.
> Also adds an entry of Quanta GSJ device tree file in Makefile.
> This is the part-1 of nuvoton-npcm730-gsj.dts.
>
> Including features:
> 1. Image partitions
> 2. pwm fan controller
> 3. usb device
> 4. serial port
> 5. fiu
>
> Tested:
> Build Quanta GSJ image and load on the GSJ BMC module.
> Ensure that BMC boots to console successful.
>
> Signed-off-by: Fran Hsu <franhsutw at gmail.com>
> ---
> arch/arm/boot/dts/Makefile | 3 +-
> arch/arm/boot/dts/nuvoton-npcm730-gsj.dts | 413 ++++++++++++++++++++++
> 2 files changed, 415 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/nuvoton-npcm730-gsj.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 127616746486..f55eedcdfec9 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -321,7 +321,8 @@ dtb-$(CONFIG_ARCH_LPC32XX) += \
> lpc3250-ea3250.dtb \
> lpc3250-phy3250.dtb
> dtb-$(CONFIG_ARCH_NPCM7XX) += \
> - nuvoton-npcm750-evb.dtb
> + nuvoton-npcm750-evb.dtb \
> + nuvoton-npcm730-gsj.dtb
> dtb-$(CONFIG_MACH_MESON6) += \
> meson6-atv1200.dtb
> dtb-$(CONFIG_MACH_MESON8) += \
> diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gsj.dts b/arch/arm/boot/dts/nuvoton-npcm730-gsj.dts
> new file mode 100644
> index 000000000000..7cac83c6566b
> --- /dev/null
> +++ b/arch/arm/boot/dts/nuvoton-npcm730-gsj.dts
> @@ -0,0 +1,413 @@
> +// SPDX-License-Identifier: GPL-2.0
> +// Copyright (c) 2019 Quanta Computer lnc. Fran.Hsu at quantatw.com
> +
> +/dts-v1/;
> +#include "nuvoton-npcm730.dtsi"
> +#include "nuvoton-npcm730-gsj-gpio.dtsi"
These include files don't exist yet. Make sure to order your patches
so that the kernel can build at each commit.
> +/ {
> + model = "Quanta GSJ Board (Device Tree v11)";
> + compatible = "nuvoton,npcm750";
> +
> + aliases {
> + ethernet0 = &emc0;
> + ethernet1 = &gmac0;
> + serial3 = &serial3;
> + udc9 = &udc9;
> + i2c0 = &i2c0;
> + i2c1 = &i2c1;
> + i2c2 = &i2c2;
> + i2c3 = &i2c3;
> + i2c4 = &i2c4;
> + i2c5 = &i2c5;
> + i2c6 = &i2c6;
> + i2c7 = &i2c7;
> + i2c8 = &i2c8;
> + i2c9 = &i2c9;
> + i2c10 = &i2c10;
> + i2c11 = &i2c11;
> + i2c12 = &i2c12;
> + i2c13 = &i2c13;
> + i2c14 = &i2c14;
> + i2c15 = &i2c15;
> + fiu0 = &fiu0;
> + };
> +
> + chosen {
> + stdout-path = &serial3;
> + };
> +
> + memory {
> + reg = <0 0x40000000>;
> + };
> +
> + ahb {
> + gmac0: eth at f0802000 {
> + phy-mode = "rgmii-id";
> + status = "okay";
> + };
> +
> + mc: memory-controller at f0824000 {
> + compatible = "nuvoton,npcm7xx-sdram-edac";
> + reg = <0xf0824000 0x1000>;
> + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + emc0: eth at f0825000 {
> + use-ncsi;
> + status = "okay";
> + };
> +
> + ehci1: usb at f0806000 {
> + status = "okay";
> + };
> +
> + ohci1: ohci at f0807000 {
> + status = "okay";
> + };
> +
> + udc9:udc at f0839000 {
> + status = "okay";
> + };
> +
> + aes:aes at f0858000 {
> + status = "okay";
> + };
> +
> + sha:sha at f085a000 {
> + status = "okay";
> + };
> +
> + fiu0: fiu at fb000000 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi0cs1_pins>;
> + status = "okay";
> + spi-nor at 0 {
> + compatible = "jedec,spi-nor";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0>;
> + spi-rx-bus-width = <2>;
> + partitions at 80000000 {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + bmc at 0{
> + label = "bmc";
> + reg = <0x000000 0x2000000>;
> + };
> + u-boot at 0 {
> + label = "u-boot";
> + reg = <0x0000000 0x80000>;
> + read-only;
> + };
> + u-boot-env at 100000{
> + label = "u-boot-env";
> + reg = <0x00100000 0x40000>;
> + };
> + kernel at 200000 {
> + label = "kernel";
> + reg = <0x0200000 0x600000>;
> + };
> + rofs at 800000 {
> + label = "rofs";
> + reg = <0x800000 0x1400000>;
> + };
> + rwfs at 1c00000 {
> + label = "rwfs";
> + reg = <0x1c00000 0x300000>;
> + };
> + reserved at 1f00000 {
> + label = "reserved";
> + reg = <0x1f00000 0x100000>;
> + };
> + };
> + };
> + };
> +
> + pcimbox: pcimbox at f0848000 {
> + status = "okay";
> + };
> +
> + apb {
> +
> + watchdog1: watchdog at 901C {
> + status = "okay";
> + };
> +
> + rng: rng at b000 {
> + status = "okay";
> + };
> +
> + serial0: serial at 1000 {
> + status = "okay";
> + };
> +
> + serial1: serial at 2000 {
> + status = "okay";
> + };
> +
> + serial2: serial at 3000 {
> + status = "okay";
> + };
> +
> + serial3: serial at 4000 {
> + status = "okay";
> + };
> +
> + adc: adc at c000 {
> + status = "okay";
> + };
> + otp:otp at 189000 {
> + status = "okay";
> + };
> +
> + i2c0: i2c at 80000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "disabled";
> + };
> +
> + i2c1: i2c at 81000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "okay";
> + lm75 at 5c {
> + compatible = "maxim,max31725";
> + reg = <0x5c>;
> + status = "okay";
> + };
> + };
> +
> + i2c2: i2c at 82000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "okay";
> + lm75 at 5c {
> + compatible = "maxim,max31725";
> + reg = <0x5c>;
> + status = "okay";
> + };
> + };
> +
> + i2c3: i2c at 83000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "okay";
> + lm75 at 5c {
> + compatible = "maxim,max31725";
> + reg = <0x5c>;
> + status = "okay";
> + };
> + };
> +
> + i2c4: i2c at 84000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "okay";
> + lm75 at 5c {
> + compatible = "maxim,max31725";
> + reg = <0x5c>;
> + status = "okay";
> + };
> + };
Please be consistent with newlines between blocks as it makes it easier to read.
> + i2c5: i2c at 85000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "disabled";
> + };
> + i2c6: i2c at 86000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "disabled";
> + };
> +
> + i2c7: i2c at 87000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "disabled";
> + };
> +
> + i2c8: i2c at 88000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "okay";
> + };
> +
> + i2c9: i2c at 89000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "okay";
> + eeprom at 55 {
> + compatible = "atmel,24c64";
> + reg = <0x55>;
> + };
> + };
> +
> + i2c10: i2c at 8a000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "okay";
> + eeprom at 55 {
> + compatible = "atmel,24c64";
> + reg = <0x55>;
> + };
> + };
> +
> + i2c11: i2c at 8b000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "okay";
> +
> + /* P12V Quarter Brick DC/DC Power Module Q54SH12050 @60 */
> + power-brick at 36 {
> + compatible = "delta,dps800";
> + reg = <0x36>;
> + };
> +
> + hotswap at 15 {
> + compatible = "ti,lm5066i";
> + reg = <0x15>;
> + };
> + };
> +
> + i2c12: i2c at 8c000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "okay";
> + ucd90160 at 6b {
> + compatible = "ti,ucd90160";
> + reg = <0x6b>;
> + };
> + };
> +
> + i2c13: i2c at 8d000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "okay";
> +
> + ipmb at 40000010 {
> + compatible = "slave-mqueue";
> + reg = <0x40000010>;
> + status = "okay";
> + };
> + };
> +
> + i2c14: i2c at 8e000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "okay";
> +
> + ipmb at 40000012 {
> + compatible = "slave-mqueue";
> + reg = <0x40000012>;
> + status = "okay";
> + };
> + };
> +
> + i2c15: i2c at 8f000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-frequency = <100000>;
> + status = "okay";
> +
> + i2c-switch at 75 {
> + compatible = "nxp,pca9548";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x75>;
> + i2c-mux-idle-disconnect;
> +
> + i2c_u20: i2c at 0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> + };
> +
> + i2c_u21: i2c at 1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + };
> +
> + i2c_u22: i2c at 2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <2>;
> + };
> +
> + i2c_u23: i2c at 3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <3>;
> + };
> +
> + i2c_u24: i2c at 4 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <4>;
> + };
> +
> + i2c_u25: i2c at 5 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <5>;
> + };
> +
> + i2c_u26: i2c at 6 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <6>;
> + };
> +
> + i2c_u27: i2c at 7 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <7>;
> + };
> + };
> + };
> +
> + pwm_fan:pwm-fan-controller at 103000 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pwm0_pins &pwm1_pins &pwm2_pins
> + &fanin0_pins &fanin1_pins
> + &fanin2_pins &fanin3_pins
> + &fanin4_pins &fanin5_pins>;
> + status = "okay";
> + fan at 0 {
> + reg = <0x00>;
> + fan-tach-ch = /bits/ 8 <0x00 0x01>;
> + cooling-levels = <127 255>;
> + };
> + fan at 1 {
> + reg = <0x01>;
> + fan-tach-ch = /bits/ 8 <0x02 0x03>;
> + cooling-levels = /bits/ 8 <127 255>;
> + };
> + fan at 2 {
> + reg = <0x02>;
> + fan-tach-ch = /bits/ 8 <0x04 0x05>;
> + cooling-levels = /bits/ 8 <127 255>;
> + };
> + };
> +
> + };
> + };
> +
> +
> +};
> --
> 2.21.0
>