Re: [PATCH linux dev-5.0] ARM: dts: aspeed: Initial git pull request for Microsoft Olympus BMC
Andrew Jeffery
andrew at aj.id.au
Thu May 2 13:36:40 AEST 2019
On Fri, 26 Apr 2019, at 03:59, Hongwei Zhang wrote:
> Olympus is a Microsoft OCP platform equipped with Aspeed 2400 BMC
> SoC.
> Tested: meta-olympus has been tested on an ASPEED AST2400 EVB board
> and MT Olympus server.
> The U-boot and kernel start and run as expected.
>
> Signed-off-by: Hongwei Zhang <hongweiz at ami.com>
> ---
> arch/arm/boot/dts/Makefile | 3 +-
> arch/arm/boot/dts/aspeed-bmc-opp-olympus.dts | 219 +++++++++++++++++++++++++++
> 2 files changed, 221 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-olympus.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bd40148..34c0b7a0 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1247,4 +1247,5 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> aspeed-bmc-opp-witherspoon.dtb \
> aspeed-bmc-opp-zaius.dtb \
> aspeed-bmc-portwell-neptune.dtb \
> - aspeed-bmc-quanta-q71l.dtb
> + aspeed-bmc-quanta-q71l.dtb \
> + aspeed-bmc-opp-olympus.dts
> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-olympus.dts
> b/arch/arm/boot/dts/aspeed-bmc-opp-olympus.dts
> new file mode 100644
> index 0000000..8b4b00d0
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-olympus.dts
> @@ -0,0 +1,219 @@
> +//SPDX-License-Identifier: GPL-2.0+
> +/dts-v1/;
> +
> +#include "aspeed-g4.dtsi"
> +#include <dt-bindings/gpio/aspeed-gpio.h>
> +
> +/ {
> + model = "Olympus BMC";
> + compatible = "microsoft,olympus-bmc", "aspeed,ast2400";
> +
> + chosen {
> + stdout-path = &uart5;
> + bootargs = "console=ttyS4,115200 earlyprintk";
> + };
> +
> + memory at 40000000 {
> + reg = <0x40000000 0x20000000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + vga_memory: framebuffer at 5f000000 {
> + no-map;
> + reg = <0x5f000000 0x01000000>; /* 16M */
> + };
> +
> + flash_memory: region at 98000000 {
> + no-map;
> + reg = <0x98000000 0x01000000>; /* 16MB */
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + bmc_heartbeat {
> + gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>;
> + };
> +
> + power_green {
> + gpios = <&gpio ASPEED_GPIO(U, 2) GPIO_ACTIVE_HIGH>;
> + };
> +
> + power_amber {
> + gpios = <&gpio ASPEED_GPIO(U, 3) GPIO_ACTIVE_HIGH>;
> + };
> +
> + identify {
> + gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
> + };
> +
> + fault {
> + gpios = <&gpio ASPEED_GPIO(A, 1) GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> +
> + iio-hwmon {
> + compatible = "iio-hwmon";
> + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
> + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
> + };
> +};
> +
> +&adc {
> + status = "okay";
> +};
> +
> +&fmc {
> + status = "okay";
> +
> + flash at 0 {
> + status = "okay";
> + m25p,fast-read;
> + label = "bmc";
> +#include "openbmc-flash-layout.dtsi"
> + };
> +};
> +
> +&spi {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi1debug_default>;
Is this how your board is strapped, or is this a copy/paste issue?
You wouldn't be the first board design to make that strapping mistake ;)
> +
> + flash at 0 {
> + status = "okay";
> + m25p,fast-read;
> + label = "pnor";
> + };
> +};
> +
> +&pinctrl {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flbusy_default &pinctrl_flwp_default
> + &pinctrl_vgahs_default &pinctrl_vgavs_default
> + &pinctrl_ddcclk_default &pinctrl_ddcdat_default>;'
This is likely junk. Please confirm you actually need these pinmux hogs.
> +};
> +
> +&uart5 {
> + status = "okay";
> +};
> +
> +&mac0 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
> +};
> +
> +&i2c0 {
> + status = "okay";
> +};
> +
> +&i2c1 {
> + status = "okay";
> +
> + tmp421 at 4c {
> + compatible = "ti,tmp421";
> + reg = <0x4c>;
> + };
> +};
> +
> +&i2c2 {
> + status = "okay";
> +};
> +
> +&i2c3 {
> + status = "okay";
> +};
> +
> +&i2c4 {
> + status = "okay";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clock-frequency = <100000>;
> +
> + slave-mqueue at 20 {
> + compatible = "slave-ipmb";
> + reg = <0x40000020>;
> + };
> +};
> +
> +&i2c5 {
> + status = "okay";
> +};
> +
> +&i2c6 {
> + status = "okay";
> +
> + tmp421 at 4c {
> + compatible = "ti,tmp421";
> + reg = <0x4c>;
> + };
> +};
> +
> +&i2c7 {
> + status = "okay";
> +};
> +
> +&vuart {
> + status = "okay";
> +};
> +
> +&wdt2 {
> + status = "okay";
> +};
> +
> +&lpc_ctrl {
> + status = "okay";
> + memory-region = <&flash_memory>;
> + flash = <&spi>;
> +};
> +
> +&mbox {
> + status = "okay";
> +};
> +
> +&pwm_tacho {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pwm0_default
> + &pinctrl_pwm1_default
> + &pinctrl_pwm2_default
> + &pinctrl_pwm3_default>;
You need to mux all the pins you're using, which appears to be pwm0-5.
Cheers,
Andrew
> +
> + fan at 0 {
> + reg = <0x00>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x00>;
> + };
> +
> + fan at 1 {
> + reg = <0x01>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x01>;
> + };
> +
> + fan at 2 {
> + reg = <0x02>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x02>;
> + };
> +
> + fan at 3 {
> + reg = <0x03>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x03>;
> + };
> +
> + fan at 4 {
> + reg = <0x04>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x04>;
> + };
> +
> + fan at 5 {
> + reg = <0x05>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x05>;
> + };
> +
> +};
> --
> 2.7.4
>
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