anyone interested in chip register error diagnostics?
Brad Bishop
bradleyb at fuzziesquirrel.com
Wed Mar 6 04:39:38 AEDT 2019
On Mon, Mar 04, 2019 at 05:53:45PM -0600, Supreeth Venkatesh wrote:
>On Mon, 2019-03-04 at 16:44 -0600, zshelle wrote:
>On Arm platforms also, There are several error syndrome registers which
>are read.
>This information leads to contruction of CPER record which will be used
>by OS to take service actions as per RAS policy.
>
>After reading 18831, it looks like you want to move error data
>collection to BMC from host firmware and for that you collect all fault
>isolation registers.
It isn't really moving - we run it on the host as well as the BMC, for
situations where the POWER processor is not able to execute instructions
due to a malfunction somewhere.
>Is there a security implication here?
Are you able to expand on this?
>
>Thank you for the proposal, I will read 18591 thoroughly to understand,
>whether we can reuse this on arm architecture.
Thanks Supreeth!
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