anyone interested in chip register error diagnostics?

[zshelle]

On POWER, I work on a component that listens for hardware errors 
reported by registers in the system chips (processors, memory buffers, 
I/O chips, etc.) and performs service actions based on those errors. I 
have been working on porting some of this code to the BMC for system 
fatal error analysis (see my work-in-progress proposals: 
https://gerrit.openbmc-project.xyz/#/c/openbmc/docs/+/18591/ and 
https://gerrit.openbmc-project.xyz/#/c/openbmc/docs/+/18831/). As part 
of the new design, we are building a generic, data-driven register error 
isolator, which will be used by several applications within POWER. 
However, it has the potential to be useful on other architectures as 
well. I am curious if anyone in the community is interested in this.