[PATCH 6/8] pinctrl: aspeed: Clarify comment about strapping W1C
Joel Stanley
joel at jms.id.au
Thu Jun 27 13:33:26 AEST 2019
On Wed, 26 Jun 2019 at 07:16, Andrew Jeffery <andrew at aj.id.au> wrote:
>
> Writes of 1 to SCU7C clear set bits in SCU70, the hardware strapping
> register. The information was correct if you squinted while reading, but
> hopefully switching the order of the registers as listed conveys it
> better.
>
> Signed-off-by: Andrew Jeffery <andrew at aj.id.au>
Acked-by: Joel Stanley <joel at jms.id.au>
> ---
> drivers/pinctrl/aspeed/pinctrl-aspeed.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> index 4c775b8ffdc4..b510bb475851 100644
> --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> @@ -209,7 +209,7 @@ static int aspeed_sig_expr_set(const struct aspeed_sig_expr *expr,
> if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP2)
> continue;
>
> - /* On AST2500, Set bits in SCU7C are cleared from SCU70 */
> + /* On AST2500, Set bits in SCU70 are cleared from SCU7C */
> if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1) {
> unsigned int rev_id;
>
> --
> 2.20.1
>
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