[PATCH dev-5.2 v2 6/7] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: gpios which inside module

Samuel Jiang chyishian.jiang at gmail.com
Fri Jul 12 16:35:11 AEST 2019


From: Samuel Jiang <Samuel.Jiang at quantatw.com>

add nuvoton-npcm750-runbmc-gpio-dtsi which include runbmc gpios
update nuvoton-npcm750-runbmc gpios which execute inside module

Signed-off-by: Samuel Jiang <Samuel.Jiang at quantatw.com>
---
 .../boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi | 157 ++++++++++++++++++
 arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts  |  37 +++++
 2 files changed, 194 insertions(+)
 create mode 100644 arch/arm/boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi

diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi b/arch/arm/boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi
new file mode 100644
index 000000000000..f2f575d099ab
--- /dev/null
+++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc-gpio.dtsi
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2019 Quanta Computer Inc. Samuel.Jiang at quantatw.com
+
+/ {
+	pinctrl: pinctrl at f0800000 {
+		gpio0ol_pins: gpio0ol-pins {
+			pins = "GPIO0/IOX1DI";
+			bias-disable;
+			output-low;
+		};
+		gpio1ol_pins: gpio1ol-pins {
+			pins = "GPIO1/IOX1LD";
+			bias-disable;
+			output-low;
+		};
+		gpio2ol_pins: gpio2ol-pins {
+			pins = "GPIO2/IOX1CK";
+			bias-disable;
+			output-low;
+		};
+		gpio3ol_pins: gpio3ol-pins {
+			pins = "GPIO3/IOX1D0";
+			bias-disable;
+			output-low;
+		};
+		gpio8o_pins: gpio8o-pins {
+			pins = "GPIO8/LKGPO1";
+			bias-disable;
+			output-high;
+		};
+		gpio9ol_pins: gpio9ol-pins {
+			pins = "GPIO9/LKGPO2";
+			bias-disable;
+			output-low;
+		};
+		gpio12ol_pins: gpio12ol-pins {
+			pins = "GPIO12/GSPICK/SMB5BSCL";
+			bias-disable;
+			output-low;
+		};
+		gpio13ol_pins: gpio13ol-pins {
+			pins = "GPIO13/GSPIDO/SMB5BSDA";
+			bias-disable;
+			output-low;
+		};
+		gpio14ol_pins: gpio14ol-pins {
+			pins = "GPIO14/GSPIDI/SMB5CSCL";
+			bias-disable;
+			output-low;
+		};
+		gpio15ol_pins: gpio15ol-pins {
+			pins = "GPIO15/GSPICS/SMB5CSDA";
+			bias-disable;
+			output-low;
+		};
+		gpio37ol_pins: gpio37ol-pins {
+			pins = "GPIO37/SMB3CSDA";
+			bias-disable;
+			output-low;
+		};
+		gpio38_pins: gpio38-pins {
+			pins = "GPIO38/SMB3CSCL";
+			bias-disable;
+			input-enable;
+		};
+		gpio39_pins: gpio39-pins {
+			pins = "GPIO39/SMB3BSDA";
+			bias-disable;
+			input-enable;
+		};
+		gpio94ol_pins: gpio94ol-pins {
+			pins = "GPIO94/nKBRST/SMB5DSDA";
+			bias-disable;
+			output-low;
+		};
+		gpio108ol_pins: gpio108ol-pins {
+			pins = "GPIO108/RG1MDC";
+			bias-disable;
+			output-low;
+		};
+		gpio109ol_pins: gpio109ol-pins {
+			pins = "GPIO109/RG1MDIO";
+			bias-disable;
+			output-low;
+		};
+		gpio110ol_pins: gpio110ol-pins {
+			pins = "GPIO110/RG2TXD0/DDRV0";
+			bias-disable;
+			output-low;
+		};
+		gpio111ol_pins: gpio111ol-pins {
+			pins = "GPIO111/RG2TXD1/DDRV1";
+			bias-disable;
+			output-low;
+		};
+		gpio112ol_pins: gpio112ol-pins {
+			pins = "GPIO112/RG2TXD2/DDRV2";
+			bias-disable;
+			output-low;
+		};
+		gpio113ol_pins: gpio113ol-pins {
+			pins = "GPIO113/RG2TXD3/DDRV3";
+			bias-disable;
+			output-low;
+		};
+		gpio208_pins: gpio208-pins {
+			pins = "GPIO208/RG2TXC/DVCK";
+			bias-disable;
+			input-enable;
+		};
+		gpio209ol_pins: gpio209ol-pins {
+			pins = "GPIO209/RG2TXCTL/DDRV4";
+			bias-disable;
+			output-low;
+		};
+		gpio210ol_pins: gpio210ol-pins {
+			pins = "GPIO210/RG2RXD0/DDRV5";
+			bias-disable;
+			output-low;
+		};
+		gpio211ol_pins: gpio211ol-pins {
+			pins = "GPIO211/RG2RXD1/DDRV6";
+			bias-disable;
+			output-low;
+		};
+		gpio212ol_pins: gpio212ol-pins {
+			pins = "GPIO212/RG2RXD2/DDRV7";
+			bias-disable;
+			output-low;
+		};
+		gpio213ol_pins: gpio213ol-pins {
+			pins = "GPIO213/RG2RXD3/DDRV8";
+			bias-disable;
+			output-low;
+		};
+		gpio214ol_pins: gpio214ol-pins {
+			pins = "GPIO214/RG2RXC/DDRV9";
+			bias-disable;
+			output-low;
+		};
+		gpio215ol_pins: gpio215ol-pins {
+			pins = "GPIO215/RG2RXCTL/DDRV10";
+			bias-disable;
+			output-low;
+		};
+		gpio216ol_pins: gpio216ol-pins {
+			pins = "GPIO216/RG2MDC/DDRV11";
+			bias-disable;
+			output-low;
+		};
+		gpio217ol_pins: gpio217ol-pins {
+			pins = "GPIO217/RG2MDIO/DVHSYNC";
+			bias-disable;
+			output-low;
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
index 35ce793d0238..53d59ee07e71 100644
--- a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
+++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
@@ -4,6 +4,7 @@
 
 /dts-v1/;
 #include "nuvoton-npcm750.dtsi"
+#include "nuvoton-npcm750-runbmc-gpio.dtsi"
 
 / {
 	model = "Nuvoton npcm750 RunBMC Module";
@@ -609,6 +610,42 @@
 		};
 	};
 
+	pinctrl: pinctrl at f0800000 {
+		pinctrl-names = "default";
+		pinctrl-0 = <
+				/******* RunBMC inside Module pins *******/
+				&gpio0ol_pins
+				&gpio1ol_pins
+				&gpio2ol_pins
+				&gpio3ol_pins
+				&gpio8o_pins
+				&gpio9ol_pins
+				&gpio12ol_pins
+				&gpio13ol_pins
+				&gpio14ol_pins
+				&gpio15ol_pins
+				&gpio37ol_pins
+				&gpio38_pins
+				&gpio39_pins
+				&gpio94ol_pins
+				&gpio108ol_pins
+				&gpio109ol_pins
+				&gpio111ol_pins
+				&gpio112ol_pins
+				&gpio113ol_pins
+				&gpio208_pins
+				&gpio209ol_pins
+				&gpio210ol_pins
+				&gpio211ol_pins
+				&gpio212ol_pins
+				&gpio213ol_pins
+				&gpio214ol_pins
+				&gpio215ol_pins
+				&gpio216ol_pins
+				&gpio217ol_pins
+				>;
+	};
+
 	leds {
 		compatible = "gpio-leds";
 		heartbeat {
-- 
2.20.1



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