[PATCH dev-5.17 v1 1/6] ARM: dts: nuvoton: Add Nuvoton RunBMC DeviceTree
Joel Stanley
joel at jms.id.au
Mon Jul 1 16:57:35 AEST 2019
Hi Samuel,
On Mon, 1 Jul 2019 at 06:02, Samuel Jiang <chyishian.jiang at gmail.com> wrote:
>
> From: Samuel Jiang <Samuel.Jiang at quantatw.com>
>
> Initial Nuvoton RunBMC Module which use NPCM750 SoC.
>
> Including features:
> 1. image partitions
> 2. lpc and kcs
> 3. usb
> 4. serial port
> 5. spi
> 6. fiu
> 7. watchdog
Do you intend submit these patches to the mainline kernel for review?
I would like to see them submitted there first.
When you do that, you don't need the "dev-5.17" part in your patch
subjects. You also can include the "tested" information in the cover
letter, but not in the patches themselves.
Please test against 5.2.
Once these patches have had review we can include them in the openbmc tree.
Cheers,
Joel
>
> Testeed:
> Build Qunata runbmc-nuvoton image and load on RunBMC-nuvoton module
>
> Signed-off-by: Samuel Jiang <Samuel.Jiang at quantatw.com>
> ---
> arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts | 292 +++++++++++++++++++
> 1 file changed, 292 insertions(+)
> create mode 100644 arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
>
> diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
> new file mode 100644
> index 000000000000..eec815d2a638
> --- /dev/null
> +++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
> @@ -0,0 +1,292 @@
> +// SPDX-License-Identifier: GPL-2.0
> +// Copyright (c) 2019 Nuvoton Technology kwliu at nuvoton.com
> +// Copyright (c) 2019 Quanta Computer Inc. Samuel.Jiang at quantatw.com
> +
> +/dts-v1/;
> +#include "nuvoton-npcm750.dtsi"
> +
> +/ {
> + model = "Nuvoton npcm750 RunBMC Module";
> + compatible = "nuvoton,npcm750";
> +
> + aliases {
> + ethernet0 = &emc0;
> + ethernet1 = &gmac0;
> + serial0 = &serial0;
> + serial1 = &serial1;
> + serial2 = &serial2;
> + serial3 = &serial3;
> + udc0 = &udc0;
> + udc1 = &udc1;
> + udc2 = &udc2;
> + udc3 = &udc3;
> + udc4 = &udc4;
> + udc5 = &udc5;
> + udc6 = &udc6;
> + udc7 = &udc7;
> + udc8 = &udc8;
> + udc9 = &udc9;
> + emmc0 = &sdhci0;
> + spi0 = &spi0;
> + spi1 = &spi1;
> + fiu0 = &fiu0;
> + fiu1 = &fiu3;
> + };
> +
> + chosen {
> + stdout-path = &serial3;
> + };
> +
> + memory {
> + reg = <0 0x40000000>;
> + };
> +
> + ahb {
> + gmac0: eth at f0802000 {
> + phy-mode = "rgmii-id";
> + snps,eee-force-disable;
> + status = "okay";
> + };
> +
> + emc0: eth at f0825000 {
> + phy-mode = "rmii";
> + use-ncsi;
> + status = "okay";
> + };
> +
> + ehci1: usb at f0806000 {
> + status = "okay";
> + };
> +
> + ohci1: ohci at f0807000 {
> + status = "okay";
> + };
> +
> + udc0:udc at f0830000 {
> + status = "okay";
> + };
> +
> + udc1:udc at f0831000 {
> + status = "okay";
> + };
> +
> + udc2:udc at f0832000 {
> + status = "okay";
> + };
> +
> + udc3:udc at f0833000 {
> + status = "okay";
> + };
> +
> + udc4:udc at f0834000 {
> + status = "okay";
> + };
> +
> + udc5:udc at f0835000 {
> + status = "okay";
> + };
> +
> + udc6:udc at f0836000 {
> + status = "okay";
> + };
> +
> + udc7:udc at f0837000 {
> + status = "okay";
> + };
> +
> + udc8:udc at f0838000 {
> + status = "okay";
> + };
> +
> + udc9:udc at f0839000 {
> + status = "okay";
> + };
> +
> + aes:aes at f0858000 {
> + status = "okay";
> + };
> +
> + sha:sha at f085a000 {
> + status = "okay";
> + };
> +
> + fiu0: fiu at fb000000 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi0cs1_pins>;
> + status = "okay";
> + spi-nor at 0 {
> + compatible = "jedec,spi-nor";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0>;
> + spi-rx-bus-width = <2>;
> + partitions at 80000000 {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + bmc at 0{
> + label = "bmc";
> + reg = <0x000000 0x4000000>;
> + };
> + u-boot at 0 {
> + label = "u-boot";
> + read-only;
> + reg = <0x0000000 0x80000>;
> + };
> + u-boot-env at 100000 {
> + label = "u-boot-env";
> + reg = <0x00100000 0x40000>;
> + };
> + kernel at 200000 {
> + label = "kernel";
> + reg = <0x0200000 0x600000>;
> + };
> + rofs at 800000 {
> + label = "rofs";
> + reg = <0x0800000 0x1500000>;
> + };
> + rwfs at 1c00000 {
> + label = "rwfs";
> + reg = <0x1c00000 0x300000>;
> + };
> + };
> + };
> + spi-nor at 1 {
> + compatible = "jedec,spi-nor";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <1>;
> + npcm,fiu-rx-bus-width = <2>;
> + partitions at 88000000 {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + spare1 at 0 {
> + label = "spi0-cs1-spare1";
> + reg = <0x0 0x800000>;
> + };
> + spare2 at 800000 {
> + label = "spi0-cs1-spare2";
> + reg = <0x800000 0x0>;
> + };
> + };
> + };
> + };
> +
> + fiu3: fiu at c0000000 {
> + pinctrl-0 = <&spi3_pins>;
> + status = "okay";
> + spi-nor at 0 {
> + compatible = "jedec,spi-nor";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0>;
> + spi-rx-bus-width = <2>;
> + partitions at A0000000 {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + system1 at 0 {
> + label = "spi3-system1";
> + reg = <0x0 0x800000>;
> + };
> + system2 at 800000 {
> + label = "spi3-system2";
> + reg = <0x800000 0x0>;
> + };
> + };
> + };
> + };
> +
> + sdhci0: sdhci at f0842000 {
> + status = "okay";
> + };
> +
> + pcimbox: pcimbox at f0848000 {
> + status = "okay";
> + };
> +
> + vcd: vcd at f0810000 {
> + status = "okay";
> + };
> +
> + ece: ece at f0820000 {
> + status = "okay";
> + };
> +
> + apb {
> +
> + watchdog1: watchdog at 901C {
> + status = "okay";
> + };
> +
> + rng: rng at b000 {
> + status = "okay";
> + };
> +
> + serial0: serial at 1000 {
> + status = "okay";
> + };
> +
> + serial1: serial at 2000 {
> + status = "okay";
> + };
> +
> + serial2: serial at 3000 {
> + status = "okay";
> + };
> +
> + serial3: serial at 4000 {
> + status = "okay";
> + };
> +
> + adc: adc at c000 {
> + status = "okay";
> + };
> +
> + otp:otp at 189000 {
> + status = "okay";
> + };
> +
> + lpc_kcs: lpc_kcs at 7000 {
> + kcs1: kcs1 at 0 {
> + status = "okay";
> + };
> +
> + kcs2: kcs2 at 0 {
> + status = "okay";
> + };
> +
> + kcs3: kcs3 at 0 {
> + status = "okay";
> + };
> + };
> +
> + lpc_host: lpc_host at 7000 {
> + lpc_bpc: lpc_bpc at 40 {
> + monitor-ports = <0x80>;
> + status = "okay";
> + };
> + };
> +
> + spi0: spi at 200000 {
> + cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
> + status = "okay";
> + };
> +
> + spi1: spi at 201000 {
> + status = "okay";
> + };
> + };
> + };
> +};
> +
> +&gcr {
> + serial_port_mux: mux-controller {
> + compatible = "mmio-mux";
> + #mux-control-cells = <1>;
> +
> + mux-reg-masks = <0x38 0x07>;
> + idle-states = <6>;
> + };
> +};
> --
> 2.20.1
>
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