Why can't /dev/ipmi0 on host be created stably

[Oskar Senft]

Hi Xiuzhi

The following observation may or may not be related to your problem:

We're using AMI BIOS with OpenBMC using the IPMI BT mode. I found that in
certain cases the host and BMC can get "out of sync" wrt. what the BMC put
in the message queue and what the BIOS expects. The problem can be caused
by the BMC responding "slowly" to an IPMI request from the BIOS where the
BIOS times out before the BMC responds. The BMC then responds before the
BIOS issues the next request, which causes the BIOS to read the previous
response as the response for the latest request.

This has resulted in all sorts of weird behavior for us, incl. the BIOS not
"detecting" the BMC and therefore not exposing it in the SMBIOS tables,
which - in our case - is the configuration source for the Linux IPMI driver.

I hope this helps?

What BIOS are you using? Are you able to make changes to the BIOS code?

Oskar.

On Tue, Jan 15, 2019 at 9:33 PM xiuzhi <1450335857 at qq.com> wrote:

> Hi All,
>    I am testing the bmc ipmi-kcs reliability.
>    The /dev/ipmi0 on host will not  be available  in several consecutive
> bmc reboot test.  The CA3 value is 0x04 which can be got by the command "mm
> -io ca3" on host bios shell when failing to create the ipmi0  .
> The CA3 value 0x04 means that SMS_ATN is set to 1, which meas:
> "Set to 1 when the BMC has one or more messages in the Receive Message
> Queue, or when a watchdog timer pre-timeout, or event message buffer full
> condition exists [2] . OEMs may also elect to set this flag is one of the
> OEM 1, 2,or 3 flags from the Get Message Flags command becomes set. R/O
> This bit is related to indicating when the BMC is the source of a system
> interrupt. Refer to sections 9.12, KCS Communication and Non-communication
> , 9.13, Physical Interrupt Line Sharing, and 9.14, Additional
> Specifications for the KCS interface for additional information on the use
> and requirements for the SMS_ATN bit."
>  see the Table 9-, KCS Interface Status Register Bits in section 9.7 of
> Intelligent Platform ManageBment Interface Specification .
>    What  causes this problem?
>  Best,
> Xiuzhi
>
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