[linux dev-4.19 03/15] mtd: spi-nor: add NPCM FIU controller driver
Joel Stanley
joel at jms.id.au
Wed Jan 16 10:53:11 AEDT 2019
Hi Tomer,
On Tue, 15 Jan 2019 at 00:07, Tomer Maimon <tmaimon77 at gmail.com> wrote:
>
> Add Nuvoton NPCM BMC Flash Interface Unit(FIU) SPI-NOR
> controller driver
>
> The FIU supports single, dual or quad communication interface.
>
> the FIU controller can operate in following modes:
> - User Mode Access(UMA): provides flash access by using an
> indirect address/data mechanism.
> - direct rd/wr mode: maps the flash memory into the core
> address space.
> - SPI-X mode: used for an expansion bus to an ASIC or CPLD.
>
> +static int npcm_fiu_uma_read(struct spi_nor *nor, u8 transaction_code,
> + u32 address, bool is_address_size, u8 *data,
> + u32 data_size)
> +{
> +
> + regmap_update_bits(host->regmap, NPCM_FIU_UMA_CTS,
> + NPCM_FIU_UMA_CTS_DEV_NUM,
> + (chip->chipselect <<
> + NPCM_FIU_UMA_CTS_DEV_NUM_SHIFT));
> + regmap_update_bits(host->regmap, NPCM_FIU_UMA_CMD,
> + NPCM_FIU_UMA_CMD_CMD, transaction_code);
> + regmap_write(host->regmap, NPCM_FIU_UMA_ADDR, address);
I notice this driver uses regmap for register reads and writes. Are
you aware that regmap has a very large overhead for every operation?
It takes a few hundred instructions to do each read/write, where as
readl/writel result in one or two instructions.
I'd strongly recommend implementing your drivers without regmap unless
you are using it to access, for example, a couple of registers that
are shared between drivers.
Cheers,
Joel
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