[PATCH v1 1/2] dt-binding: iio: add NPCM ADC documentation

[Tomer Maimon]

Hi Rob,

On Thu, 3 Jan 2019 at 23:14, Rob Herring <robh at kernel.org> wrote:

> On Mon, Dec 24, 2018 at 06:47:54PM +0200, Tomer Maimon wrote:
> > Added device tree binding documentation for Nuvoton BMC
> > NPCM Analog-to-Digital Converter(ADC).
> >
> > Signed-off-by: Tomer Maimon <tmaimon77 at gmail.com>
> > ---
> >  .../bindings/iio/adc/nuvoton,npcm-adc.txt          | 35
> ++++++++++++++++++++++
> >  1 file changed, 35 insertions(+)
> >  create mode 100644
> Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt
> >
> > diff --git
> a/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt
> b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt
> > new file mode 100644
> > index 000000000000..6f0843d837cc
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt
> > @@ -0,0 +1,35 @@
> > +Nuvoton NPCM Analog to Digital Converter (ADC)
> > +
> > +The NPCM ADC is a 10-bit converter for eight channel inputs.
> > +
> > +Required properties:
> > +- compatible : "nuvoton,npcm750-adc" for the NPCM7XX BMC.
> > +- reg                        : specifies physical base address and size
> of the registers.
> > +- interrupts : Contain the ADC interrupt with flags for falling edge.
> > +
> > +Optional properties:
> > +- clocks             : phandle of ADC reference clock, in case the
> clock is not
> > +                               added the ADC will use the default ADC
> sample rate.
> > +- vref-supply        : The regulator supply ADC reference voltage, in
> case the
> > +                               vref-supply is not added the ADC will
> use internal voltage
> > +                               reference.
> > +
> > +Required Node in the NPCM7xx BMC:
> > +An additional register is present in the NPCM7xx SOC which is
> > +assumed to be in the same device tree, with and marked as
> > +compatible with "nuvoton,npcm750-rst".
> > +
> > +Example:
> > +
> > +adc: adc at f000c000 {
> > +     compatible = "nuvoton,npcm750-adc";
> > +     reg = <0xf000c000 0x8>;
> > +     interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
> > +     clocks = <&clk NPCM7XX_CLK_ADC>;
> > +};
> > +
> > +rst: rst at f0801000 {
>
> Why is this node here?
>
example for the reset node that required when using NPCM7xx SOC.
(Required Node in the NPCM7xx BMC:
An additional register is present in the NPCM7xx SOC which is
assumed to be in the same device tree, with and marked as
compatible with "nuvoton,npcm750-rst")

>
> > +     compatible = "nuvoton,npcm750-rst", "syscon",
> > +     "simple-mfd";
> > +     reg = <0xf0801000 0x6C>;
> > +};
> > --
> > 2.14.1
> >
>

Thanks,

Tomer
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