[PATCH linux dev-5.2 5/5] ARM: dts: ast2600-evb: eMMC configuration
Andrew Jeffery
andrew at aj.id.au
Fri Aug 30 19:02:44 AEST 2019
Enable the eMMC controller and limit it to 52MHz to avoid the host
controller reporting error conditions.
Signed-off-by: Andrew Jeffery <andrew at aj.id.au>
---
arch/arm/boot/dts/aspeed-ast2600-evb.dts | 8 +++++++-
arch/arm/boot/dts/aspeed-g6.dtsi | 4 ++--
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
index 2cb92d2a1041..9613cff2ce3a 100644
--- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
@@ -39,8 +39,14 @@
phy-handle = <ðphy1>;
};
+&emmc_controller {
+ status = "okay";
+};
+
&emmc {
- status = "disabled";
+ non-removable;
+ bus-width = <4>;
+ max-frequency = <52000000>;
};
&fsim0 {
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index d0507f797981..12569e502678 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -235,7 +235,7 @@
};
};
- emmc: sdc at 1e750000 {
+ emmc_controller: sdc at 1e750000 {
compatible = "aspeed,ast2600-sd-controller";
reg = <0x1e750000 0x100>;
#address-cells = <1>;
@@ -244,7 +244,7 @@
clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
status = "disabled";
- sdhci at 1e750100 {
+ emmc: sdhci at 1e750100 {
compatible = "aspeed,ast2600-sdhci";
reg = <0x100 0x100>;
sdhci,auto-cmd12;
--
2.20.1
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