[PATCH linux dev-4.13] clk: aspeed: Prevent reset and enable if clock is already enabled

Lei YU mine260309 at gmail.com
Wed Mar 7 12:59:40 AEDT 2018


On Wed, Mar 7, 2018 at 7:09 AM, Andrew Jeffery <andrew at aj.id.au> wrote:
>
>
> On Wed, 7 Mar 2018, at 06:54, Eddie James wrote:
>> Systems are seeing some issues where the LPC clock gets into a bad state
>> when the ASPEED clock driver resets and enables the clock during
>> startup. The LPC clock (according to AST2500 spec) is enabled by default,
>> so resetting and re-enabling is not desired.
>
> Well, maybe. Why do we have to avoid this sequence?

This change is based on the finding of
https://github.com/openbmc/openbmc/issues/2948

>
>> Add a simple check before the
>> enable procedure to see if the clock is already enabled.
>
> I don't think this actually solves the problem, just papers over it. Can we solve it properly?

According to Aspeed spec, the rest sequence should be done when the
clock is stopped.
It does not mention what happens if the reset sequence is done when
the clock is already
enabled. And from testing it shows the LPC is having some problem in this case.
So I want to make sure the reset sequence is done only when the clock
is in stopped state.

>
> Andrew


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