[PATCH linux dev-4.17 4/7] dts: Aspeed: Add Aspeed sdhci dts document

[Joel Stanley]

On 11 July 2018 at 15:17, Ryan Chen <ryanchen.aspeed at gmail.com> wrote:
> This add Aspeed sdhci irq driver's dts file and devicetree document

The bindings document (Documentation/devicetree) should be a separate
patch to the device tree changes (arch/arm/boot/dts). The bindings
will be merged with the code, while the device tree changes are merged
by the architecture maintainer.


>
> Signed-off-by: Ryan Chen <ryanchen.aspeed at gmail.com>
> ---
>  .../aspeed,aspeed-sdhci-ic.txt                     | 25 ++++++++++++++++++++++
>  arch/arm/boot/dts/aspeed-g4.dtsi                   | 20 +++++++++++++++++
>  arch/arm/boot/dts/aspeed-g5.dtsi                   | 20 +++++++++++++++++
>  3 files changed, 65 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,aspeed-sdhci-ic.txt
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,aspeed-sdhci-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/aspeed,aspeed-sdhci-ic.txt
> new file mode 100644
> index 0000000..e3393c3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/aspeed,aspeed-sdhci-ic.txt
> @@ -0,0 +1,25 @@
> +Device tree configuration for the SDHCI Interrupt Controller on the AST24XX and
> +AST25XX SoCs.
> +
> +Required Properties:
> +- #address-cells       : should be 1
> +- #size-cells          : should be 1
> +- #interrupt-cells     : should be 1
> +- compatible           : should be "aspeed,aspeed-sdhci-ic"
> +- reg                  : address start and range of controller
> +- interrupts           : interrupt number
> +- interrupt-controller : denotes that the controller receives and fires
> +                         new interrupts for child busses
> +
> +Example:
> +
> +sdhci_ic: interrupt-controller at 0 {
> +       #interrupt-cells = <1>;
> +       #size-cells = <1>;
> +       #interrupt-cells = <1>;
> +       compatible = "aspeed,aspeed-sdhci-irq";
> +       reg = <0x0 0x100>;
> +       interrupts = <26>;
> +       interrupt-controller;
> +       clocks = <&syscon ASPEED_CLK_GATE_SDCLKCLK>;
> +};
> \ No newline at end of file
> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
> index e86fa80..7ad646d 100644
> --- a/arch/arm/boot/dts/aspeed-g4.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi
> @@ -190,6 +190,13 @@
>                                 reg = <0x1e720000 0x8000>;      // 32K
>                         };
>
> +                       sdhci: sdhci at 1e740000 {
> +                               compatible = "simple-bus";
> +                               #address-cells = <1>;
> +                               #size-cells = <1>;
> +                               ranges = <0 0x1e740000 0x1000>;
> +                       };
> +
>                         gpio: gpio at 1e780000 {
>                                 #gpio-cells = <2>;
>                                 gpio-controller;
> @@ -369,6 +376,19 @@
>         };
>  };
>
> +&sdhci {
> +
> +       sdhci_ic: interrupt-controller at 0 {
> +               #interrupt-cells = <1>;
> +               compatible = "aspeed,aspeed-sdhci-irq";
> +               reg = <0x0 0x100>;
> +               interrupts = <26>;
> +               interrupt-controller;
> +               clocks = <&syscon ASPEED_CLK_GATE_SDCLKCLK>;
> +       };
> +
> +};
> +
>  &i2c {
>         i2c_ic: interrupt-controller at 0 {
>                 #interrupt-cells = <1>;
> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
> index d92f047..ba850ca 100644
> --- a/arch/arm/boot/dts/aspeed-g5.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
> @@ -256,6 +256,13 @@
>                                 reg = <0x1e720000 0x9000>;      // 36K
>                         };
>
> +                       sdhci: sdhci at 1e740000 {
> +                               compatible = "simple-bus";
> +                               #address-cells = <1>;
> +                               #size-cells = <1>;
> +                               ranges = <0 0x1e740000 0x1000>;
> +                       };
> +
>                         gpio: gpio at 1e780000 {
>                                 #gpio-cells = <2>;
>                                 gpio-controller;
> @@ -446,6 +453,19 @@
>         };
>  };
>
> +&sdhci {
> +
> +       sdhci_ic: interrupt-controller at 0 {
> +               #interrupt-cells = <1>;
> +               compatible = "aspeed,aspeed-sdhci-irq";
> +               reg = <0x0 0x100>;
> +               interrupts = <26>;
> +               interrupt-controller;
> +               clocks = <&syscon ASPEED_CLK_GATE_SDCLKCLK>;
> +       };
> +
> +};
> +
>  &i2c {
>         i2c_ic: interrupt-controller at 0 {
>                 #interrupt-cells = <1>;
> --
> 2.7.4
>