[PATCH linux dev-4.13 v2] ARM: dts: aspeed-g5: Add DAC MUX userspace control

Joel Stanley joel at jms.id.au
Fri Apr 20 17:37:49 AEST 2018


This exposes SCU2C "Misc. Control Register" bits 16 and 17 which control
the input to the VGA DAC. They are used to select which graphics device
drives the analog output:

  00: VGA mode (default)
  01: Graphics CRT mode
  10: Pass-through mode from Video input port-A
  11: Pass-through mode from Video input port-B

We don't need the reg property, so remove it and the unit name.

OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery <andrew at aj.id.au>
Signed-off-by: Joel Stanley <joel at jms.id.au>
---
v2: Consolidate the two SCU scratch register nodes into one

 arch/arm/boot/dts/aspeed-g5.dtsi | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 4ca4bc463347..01b66359e6d6 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -158,9 +158,8 @@
 
 				};
 
-				vga_scratch: scratch at 50 {
+				vga_scratch: scratch {
 					compatible = "aspeed,bmc-misc";
-					reg = <0x50 0x20>;
 				};
 
 				hwrng at 78 {
@@ -1441,6 +1440,11 @@
 };
 
 &vga_scratch {
+	dac_mux {
+		offset = <0x2c>;
+		bit-mask = <0x3>;
+		bit-shift = <16>;
+	};
 	vga0 {
 		offset = <0x50>;
 		bit-mask = <0xffffffff>;
-- 
2.17.0



More information about the openbmc mailing list