[RFC PATCH linux dev-4.13 2/3] dts: aspeed-g5: Expose VGA scratch registers

[Joel Stanley]

On 12 April 2018 at 13:21, Andrew Jeffery <andrew at aj.id.au> wrote:
> Signed-off-by: Andrew Jeffery <andrew at aj.id.au>
> ---
>  arch/arm/boot/dts/aspeed-g5.dtsi | 48 ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 48 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
> index 1468b4ad22dc..8321df50c593 100644
> --- a/arch/arm/boot/dts/aspeed-g5.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
> @@ -158,6 +158,11 @@
>
>                                 };
>
> +                               vga_scratch: scratch at 50 {
> +                                       compatible = "aspeed,bmc-misc";

Convention is to use aspeed,<socname>-<hardware>, so this would be
aspeed,ast2500-bmc-misc.


> +                                       reg = <0x50 0x20>;
> +                               };
> +
>                                 hwrng at 78 {
>                                         compatible = "timeriomem_rng";
>                                         reg = <0x78 0x4>;
> @@ -1425,3 +1430,46 @@
>                 groups = "WDTRST2";
>         };
>  };
> +
> +&vga_scratch {
> +       vga0 {

Do these names come out in the userspace API?

> +               offset = <0x50>;

Would reg <> be more devicetree-y than offset = <>?


> +               bit-mask = <0xffffffff>;
> +               bit-shift = <0>;

Should we assume this is the default? Or something else? Having a
default for the common case would be nice.

> +       };
> +       vga1 {
> +               offset = <0x54>;
> +               bit-mask = <0xffffffff>;
> +               bit-shift = <0>;