[RFC PATCH linux dev-4.13 3/3] dts: aspeed-g5: Expose SuperIO scratch registers
Andrew Jeffery
andrew at aj.id.au
Thu Apr 12 13:51:45 AEST 2018
Signed-off-by: Andrew Jeffery <andrew at aj.id.au>
---
arch/arm/boot/dts/aspeed-g5.dtsi | 88 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 88 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 8321df50c593..25a88dd44d91 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -325,6 +325,11 @@
status = "disabled";
};
+ sio_scratch: scratch at f0 {
+ compatible = "aspeed,bmc-misc";
+ reg = <0xf0 0x10>;
+ };
+
mbox: mbox at 180 {
compatible = "aspeed,ast2500-mbox";
reg = <0x180 0x5c>;
@@ -1473,3 +1478,86 @@
bit-shift = <0>;
};
};
+
+&sio_scratch {
+ siorx_2b {
+ offset = <0xf0>;
+ bit-mask = <0xff>;
+ bit-shift = <24>;
+ };
+ siorx_2a {
+ offset = <0xf0>;
+ bit-mask = <0xff>;
+ bit-shift = <16>;
+ };
+ siorx_29 {
+ offset = <0xf0>;
+ bit-mask = <0xff>;
+ bit-shift = <8>;
+ };
+ siorx_28 {
+ offset = <0xf0>;
+ bit-mask = <0xff>;
+ bit-shift = <0>;
+ };
+ siorx_2f {
+ offset = <0xf4>;
+ bit-mask = <0xff>;
+ bit-shift = <24>;
+ };
+ siorx_2e {
+ offset = <0xf4>;
+ bit-mask = <0xff>;
+ bit-shift = <16>;
+ };
+ siorx_2d {
+ offset = <0xf4>;
+ bit-mask = <0xff>;
+ bit-shift = <8>;
+ };
+ siorx_2c {
+ offset = <0xf4>;
+ bit-mask = <0xff>;
+ bit-shift = <0>;
+ };
+ siorx_23 {
+ offset = <0xf8>;
+ bit-mask = <0xff>;
+ bit-shift = <24>;
+ };
+ siorx_22 {
+ offset = <0xf8>;
+ bit-mask = <0xff>;
+ bit-shift = <16>;
+ };
+ siorx_21 {
+ offset = <0xf8>;
+ bit-mask = <0xff>;
+ bit-shift = <8>;
+ };
+ siorx_20 {
+ offset = <0xf8>;
+ bit-mask = <0xff>;
+ bit-shift = <0>;
+ };
+ siorx_27 {
+ offset = <0xfc>;
+ bit-mask = <0xff>;
+ bit-shift = <24>;
+ };
+ siorx_26 {
+ offset = <0xfc>;
+ bit-mask = <0xff>;
+ bit-shift = <16>;
+ };
+ siorx_25 {
+ offset = <0xfc>;
+ bit-mask = <0xff>;
+ bit-shift = <8>;
+ };
+ siorx_24 {
+ offset = <0xfc>;
+ bit-mask = <0xff>;
+ bit-shift = <0>;
+ };
+};
--
2.14.1
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